1. Analyze the synchronous FSM with outputs Q2, Q1, Q0 shown...

1. Analyze the synchronous FSM with outputs Q2, Q1, Q0 shown in Figure 1. Obtain the following: a) flip-flop input excitation equations b) state table c) state diagram. Initially all flip-flops were preset. Does the FSM have hang-up states? XOR clock Bit 1 Bit 2 Bit 3 Q0 Q1 Q2 D Q D Q D Q Figure 1. Schematic of the FSM producing a sequence of repeated timing signals at outputs Q2, Q1, Q0.

Labs

Want to see this concept in action?

NEW

Explore this concept interactively to see how it behaves as you change inputs.

View Labs

Transcript

00:01 So here we in this question we have to analyze the synchronous fsm with the output q1, q2, q0 as shown in the figure.

00:10 So if we compare these values from the figure, in the first part we have to analyze the flip flop input.

00:17 So from the figure we can say that we are having the value of d2 that is equals to q1.

00:22 We are having the value of d1 that is equals to q0 and we are also having the value of d0 that is equals to q2 plus q1.

00:31 So after observing the figure in detail we get the values of d1 and d2, d3.

00:37 Hence the answer to the part 1 of the question.

00:40 Now we are considering about the second part.

00:41 In the second part we have to state the table for the given figure.

00:46 So if we observe the figure we are considering about the present state.

00:50 Let's say d2 from here is equals to q2 positive.

00:53 D1 is equals to q1 positive and d0 is equals to q0 positive from here.

00:58 If we are considering about the present state which from here is about q2, q1 and q0.

01:07 Next we are having next state that is from q2 plus, q1 plus and q0 plus.

01:15 Then we are having the state that is d2, d1 and d0.

01:19 So these are the states we are having.

01:21 If q2 is 0, q1 is 0 and this is 0 then next state is 0, 0, 0 and this 2 again is equals to 0...

Question

Please give Ace some feedback