1. Find the lock and capture frequencies for PLL 565, with a free-running frequency of 120 kHz, demodulation capacitor of 1 μF, and supply voltage of ±5 V.
2. For the VCO circuit shown in Fig. 10.12(c), assume R2 = 1.5 kΩ, R1 = R3 = 12 kΩ, C2 = 0.001 μF, and VCC = 10 V. Calculate the output frequency and the change in output frequency if the modulating input vC is varied from 7 V to 8 V.
3. What do you mean by data converters?
4. Define D/A conversion.
5. Distinguish full-scale error and linearity error of a D/A converter.