4. Design a finite state machine (FSM) for a counter that counts through the 3-bit prime numbers downwards. Assume the counter starts with initial prime value p[2:0] set to 010 as its first 3 bit prime number. Each bit of p is represented by p[2], p[1], and p[0]. You need to provide the state transition table and the state transition diagram. Hint: The set of all 3-bit prime numbers includes 2, 3, 5 and 7. (a) How many states are in this FSM? What is the minimum number of flipflops for this FSM? (b) Draw a state transition diagram (c) Draw an encoded state transition table and derive the equation(s) of the flipflop input(s) (d) Draw an output table and derive the equation of output signals p[2:0] (e) Draw a schematic of the prime number counter
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The minimum number of flip-flops needed for this FSM is 2, as 2^2 = 4 which is enough to represent all the states. (b) The state transition diagram would look like this: ``` 7 (111) --> 5 (101) --> 3 (011) --> 2 (010) --> 7 (111) ``` (c) The encoded state Show more…
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Sri K.
Shown below is a FSM with 32 states. The two inputs are X and Y, in this order (that is, from state A, X=0 and Y=1 leads to state B). Note that the arrows which extend off of the sides wrap around to the top to complete the pattern (that is, from state MM, input 10 goes to state E, and input 11 goes to state F). Input 01 always goes to the state on the right, 10 to the state beneath, and 11 downwards and to the right. The five output bits are, in order from most to least significant for the output integers: z1 z0 w2 w1 w0. Answer the following questions: A: What is the minimum number of state variables that can be used to implement this FSM? B: What is the minimum number of TFFs that can be used to implement this FSM? C: How many total state transitions exist in this FSM? D: Suppose that input X were always connected to ground. Draw the new state diagram (hint: the reset state is always reachable). How many states and state transitions would be removed (note: a state transition is removed if its beginning state or its end state are removed)? E: Suppose instead that input Y were always connected to ground. Draw the new state diagram. How many states and state transitions would be removed? F: What two circuits implemented separately would implement this 32-state FSM? Why? (Hint: What FSM did the 32-state FSM reduce to in step D?)
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