4. Evaluate the following circuits, all driving a load cap of 600 with an input cap of 6. For each of these circuits, find the optimal stage effort, f, and calculate the minimal path delay from A to Q assuming the circuits have been optimized to minimize that delay.
a. A circuit with two stages of inverters
600
b. A circuit with three stages of inverters
600
c. A circuit with four stages of inverters
600
d. What would be the impact of adding a 5th inverter stage?
e. Write a closed form equation for the total optimal delay for these circuits given the parameter n: the number of stages.