Question

5. A communication system consists of the transmitter and receiver blocks for 2-bit messages. Messages represent a 2-bit code (B1, BO) and parity bit P generated at the transmitter side for even parity. During transmission, signals B1, BO, P can be distorted by noise which may result in erroneous interpretation of one of the signals. At the receiver side the parity checking circuit determines if the received message contains a single error. The parity checker has inputs B1, BO, P and output A (acknowledge) such that A =1 as long as the received message parity is even (not altered to odd parity due to misinterpretation of one of the signals). Obtain the following a) Truth tables for functions P (B1, BO) and A (B1, BO, P). b) Schematics for the parity bit generator with output P and the parity bit checker with output A. A =1 if no parity change of the message is detected otherwise A = 0. Use XOR or XNOR gates.

          5. A communication system consists of the transmitter and receiver blocks for 2-bit messages.
Messages represent a 2-bit code (B1, BO) and parity bit P generated at the transmitter side for even
parity. During transmission, signals B1, BO, P can be distorted by noise which may result in erroneous
interpretation of one of the signals. At the receiver side the parity checking circuit determines if the
received message contains a single error. The parity checker has inputs B1, BO, P and output A
(acknowledge) such that A =1 as long as the received message parity is even (not altered to odd parity
due to misinterpretation of one of the signals). Obtain the following
a) Truth tables for functions P (B1, BO) and A (B1, BO, P).
b) Schematics for the parity bit generator with output P and the parity bit checker with output A.
A =1 if no parity change of the message is detected otherwise A = 0. Use XOR or XNOR gates.

5. A communication system consists of the transmitter and receiver blocks for 2-bit messages.
Messages represent a 2-bit code (B1, BO) and parity bit P generated at the transmitter side for even
parity. During transmission, signals B1, BO, P can be distorted by noise which may result in erroneous
interpretation of one of the signals. At the receiver side the parity checking circuit determines if the
received message contains a single error. The parity checker has inputs B1, BO, P and output A
(acknowledge) such that A =1 as long as the received message parity is even (not altered to odd parity
due to misinterpretation of one of the signals). Obtain the following
a) Truth tables for functions P (B1, BO) and A (B1, BO, P).
b) Schematics for the parity bit generator with output P and the parity bit checker with output A.
A =1 if no parity change of the message is detected otherwise A = 0. Use XOR or XNOR gates.

Added by Chelsey M.

Question

Please give Ace some feedback