7. (10pts) Here is a series of address references given as word addresses: 1, 20, 9, 4, 17, 9, 11, 4, 9, 20, 17. Assume a direct-mapped cache with 8 one-word blocks that initially empty, label each memory reference in the list as a hit or a miss and complete the cache table below. Assume memory address is 6-bit long (given in parenthesis). What is the hit rate? Cache Valid Block bit Tag Data Reference Hit or miss 1 (000001) 0 20 (010100) 1 9 (001001) 2 4(000100) 3 17 (010001) 4 9 (001001) 5 11 (001011) 6 4 (000100) 7 9 (001001) 20 (010100) hit rate = 17 (010001)
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- The cache is 6 bits long, which means it can store 2^6 = 64 blocks. - The cache is initially empty, so all references will result in a miss until the cache is filled. - The "Cache Valid" column indicates whether the cache block is valid or not. A value of 1 Show more…
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For a direct-mapped cache design with a 32-bit address, the following bits of the address are used to access the cache: Tag (31-12), Index (11-6), Offset (5-0). a. What is the cache block size in words? b. How many entries does this cache have? c. What is the ratio between the total bits required for such a cache implementation and the data storage bits?
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