A) Design a 3-input NAND gate using NMOS Logic. b) Design a 2-input NOR gate using PMOS Logic
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QUESTION FOUR (a) Show the logical arrangement for implementing A four-input NAND gate using two-input AND gates and NOT gates. (ii) A three-input NAND gate using two-input NAND gates. (iii) A NOT circuit using a two-input NAND gate. (iv) A NOT circuit using a two-input NOR gate. (v) A NOT circuit using a two-input EX-NOR gate.
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A logic circuit has three inputs, A, B and C. It generates an output of 1 only when A = 0, B = 1, C = 0 or when A = 1, B = 1, C = 0. Design a combinational circuit for this system.
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If the output of a logic gate is 0 when all its inputs are at logic 1 , then the gate is either (a) NAND or XNOR (b) NOR or $\mathrm{OR}$ (c) XOR or NOR (d) AND or NOR
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