(c) Design a 4-bit even parity generator, which has four-bit binary inputs (A3, A2, A1, A0) and produces one output; P. The output P is HIGH (1) if the number of 1's in the input vector are odd. Output P is LOW if the number of 1's in the input vector are even. Implement this parity generator using multiplexer IC 74LS138 (8-to-1 multiplexer) as shown in Figure Q2(c). Show all the steps and wiring of the IC 74LS138.
Vcc
So S1 S2
EN
GND