Can someone explain to me the logic for this high-level state machine? I don't understand what the sample state does. Won't it just set temp0 to temp3 to the current value?
For example, the first time it samples, let's say CT = 100. Temp0 to temp3 will be set to 100.
Then the second time around, CT = 101, so Temp0 to temp3 will be 101 and so on.
I don't understand how that would get the average of 4 CONSECUTIVE temperatures.
5.14 Use the RTL design process to create an alarm system that sets a single-bit output alarm to 1 when the average temperature of four consecutive samples meets or exceeds a user-defined threshold value. A 32-bit unsigned input CT indicates the current temperature, and a 32-bit unsigned input WT indicates the warning threshold. Samples should be taken every few clock cycles. A single-bit input clr, when 1, disables the alarm and the sampling process. Start by capturing the desired system behavior as an HLSM, and then convert it to a controller/datapath.
Step 1 - Capture a high-level state machine:
Inputs: CT, WT (32 bits); clr (bit)
Outputs: alarm (bit)
Local Registers: tmp0, tmp1, tmp2, tmp3, avg (32 bits)
clr
clr
clr
clr
AlrmOn alarm := 1
Clr
clr * (avg >= WT) clr' clr'
alarm
111
Sample
AlrmOff
alarm = 0
tmp0 = 0
tmp1 := 0
tmp2 := 0
tmp3 = 0
avg = 0
tmp0 := CT
clr * (avg >= WT)
tmp1 = tmp0
tmp2 := tmp1
tmp3 := tmp2
avg := (tmp0 + tmp1 + tmp2 + tmp3) / 4
alarm := 0