Text: CECS 225 Digital Logic and Assembly Programming Complete the code skeleton below to create the ALU:
timescale 1ns / 1ps
module ALU(ALUControl, A, B, Result, Zero_Flag);
input [2:0] ALUControl;
input [31:0] A, B;
output [31:0] Result;
output Zero_Flag;
wire [31:0] ANDout, ORout, SUMout, DIFFout, LTout;
AND_32 and(.argA(A), .argB(B), .AandB(ANDout));
OR_32 or(.argA(A), .argB(B), .AorB(ORout));
Adder_32 add(.augendA(A), .addendB(B), .sum(SUMout));
Subtracter_32 sub(.subtrahend(A), .minuend(B), .difference(DIFFout));
SetLessThan_32 slt(.argA(A), .argB(B), .AltB(LTout));
Mux8tol_32bit m81(.Sel(ALUControl[2]), .Ini(ANDout), .In2(ORout), .In3(SUMout), .In4(DIFFout), .In5(LTout), .In6(32'bX), .In7(32'bX), .Out(Result));
assign Zero_Flag = (Result == 0);
endmodule