Question

Full adder 1 bit: A full adder is a combinational circuit that forms the arithmetic sum of three bits. It consists of three inputs and two outputs. Two of the input variables, denoted by x and y, represent the two significant bits to be added. The third input, Cin, is the carry-in from the previous lower significant position. X Y CIN S COUT Figure 2: full adder of 1 bit Two outputs are necessary because the arithmetic sum of three binary digits ranges in value from 0 to 3, and binary representation of 2 or 3 needs two bits. The two outputs are designated by the symbols S for sum and Cout for carry out. Figure 2 represent a full adder in logic gates level. Note that, the outputs are related to inputs by the following equations: S = Cin ? (X ? Y) Cout = (X · Y) + (Cin · X) + (Cin · Y) Experimental work: 1. Write Verilog codes; Gate-level, data-flow, and behavioral level of abstraction for the full-adder circuit functionality in Figure 2, and make a test bench code for one of them. 30pts 2. Make a four bits Carry Ripple Full Adder based on the Full Adder created above. 20pts

          Full adder 1 bit:

A full adder is a combinational circuit that forms the arithmetic sum of three bits. It consists of three inputs and two outputs. Two of the input variables, denoted by x and y, represent the two significant bits to be added. The third input, Cin, is the carry-in from the previous lower significant position.

X
Y
CIN
S
COUT
Figure 2: full adder of 1 bit

Two outputs are necessary because the arithmetic sum of three binary digits ranges in value from 0 to 3, and binary representation of 2 or 3 needs two bits. The two outputs are designated by the symbols S for sum and Cout for carry out. Figure 2 represent a full adder in logic gates level. Note that, the outputs are related to inputs by the following equations:

S = Cin ? (X ? Y)
Cout = (X · Y) + (Cin · X) + (Cin · Y)

Experimental work:

1. Write Verilog codes; Gate-level, data-flow, and behavioral level of abstraction for the full-adder circuit functionality in Figure 2, and make a test bench code for one of them. 30pts
2. Make a four bits Carry Ripple Full Adder based on the Full Adder created above. 20pts

Full adder 1 bit:

A full adder is a combinational circuit that forms the arithmetic sum of three bits. It consists of three inputs and two outputs. Two of the input variables, denoted by x and y, represent the two significant bits to be added. The third input, Cin, is the carry-in from the previous lower significant position.

X
Y
CIN
S
COUT
Figure 2: full adder of 1 bit

Two outputs are necessary because the arithmetic sum of three binary digits ranges in value from 0 to 3, and binary representation of 2 or 3 needs two bits. The two outputs are designated by the symbols S for sum and Cout for carry out. Figure 2 represent a full adder in logic gates level. Note that, the outputs are related to inputs by the following equations:

S = Cin ? (X ? Y)
Cout = (X · Y) + (Cin · X) + (Cin · Y)

Experimental work:

1. Write Verilog codes; Gate-level, data-flow, and behavioral level of abstraction for the full-adder circuit functionality in Figure 2, and make a test bench code for one of them. 30pts
2. Make a four bits Carry Ripple Full Adder based on the Full Adder created above. 20pts

Added by Carla H.

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