I_(ref)=50mu A |V_(eff)|=0.2V |V_(t)|=0.5V V_(dd)=3V M5 and M7 are 2x larger than M8 lambda=0.2V^(-1) C_(1)=C_(2)=100fF Iref=50 A IVefr|=0.2V |V|=0.5 V V=3V M5 and M7 are 2X larger than M8 =0.2 V-1
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Step 1: Calculate the W/L ratio for M8 using the equation W/L = (2*Iref)/(Kp*(Vdd-Vt)^2), where Kp is the transconductance parameter. Show more…
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Homework #2 Due Date: September 17th, 2019 @ 1:00 p.m. in lecture room 1. A galvanometer with a 40-̩ coil is rated at 10-mA full scale. Determine the required shunt resistance if it is to be used to measure a full-scale current of a.) 2 A b.) 20 A 2. A galvanometer with a 40-̩ coil is rated at 50-μA full scale. Determine the required series resistance if it is to be used to measure a full-scale voltages of a.) 10 V b.) 100 V 3. Find the loading error for the voltmeter of problem 2 a.) and 2 b.) if it is used to measure voltage from a source with resistance RS = 10 ̩. 4. Compute the quantization increment for an M-bit A/D converter having a full-scale range of ±10 V. Let M be 4, 8, 12, and 16. 5. A 12-bit A/D converter having an input range 0-5 V has a relative accuracy of 0.03% of full scale. Estimate its quantization error in volts. What is the total possible error (accumulated error) expected in volts? 6. An 8-bit D/A converter shows an output of 3.58 V when straight binary 10110011 is applied. What is the output voltage when 01100100 is applied? 7. Determine the theoretical sampling rate, if the following signal is to be sampled using a 12-bit, ±5 V data-acquisition board: y(t) = 4 sin 8πt + 2 sin 20πt + 3 sin 42πt volts 8. The 12-bit A/D converter with the specifications listed below is to be used in an environment in which the A/D converter temperature may change by ±10 °C. Estimate the contributions of conversion and quantization errors to the uncertainty in the digital representation of an analog voltage by the converter. Analog-to-Digital Converter Input range 0 - 10 V Input resolution 12 bits Linearity ±3 LSB Temperature drift 1 LSB / 5 °C 9. The voltage from a strain gage balance scale of 0-5 kg is expected to vary from 0 to 3.50 mV. The required resolution from a strain gage balance scale is 0.05 kg. The signal is to be recorded by using a 12-bit A/D converter having a full-scale range of 0-10 V with the weight displayed on a computer monitor. Suggest an appropriate amplifier gain for this situation. 10. Select (with calculation detail) the sufficient resolution of the A/D converter to convert an analog signal from a load cell with full scale range of 100 kg at 2 volts. The required resolution of the load reading is 100 grams. The A/D converter is designed to receive the maximum analog voltage at 2.5 volts. Hint: The answer is one of the following 8, 10, 12, 16 and 24 bits.
Supreeta N.
A. Develop a Thévenin equivalent circuit (calculate VTH in series with ZTH) modelling the source of the common-mode interference voltage, VCM, found on the human body resulting from the capacitance Ca = 2 pF between the nearby 120 VRMS 60 Hz mains supply and the body, and the capacitance Cb = 3 pF between the body and the earth (0 V). B. Figure 4 shows the Thévenin equivalent model of the mains supply, human body, and earth, which causes a common-mode voltage on the body, VCM. Also shown, the first two stages of an instrumentation amplifier with its input terminals connected to the body using two electrodes. RL = 15 kΩ models the impedance of the right-leg electrode and right leg. Alter the circuit in Figure 4 to include a driven right leg (DRL) circuit to improve the overall common-mode rejection performance of the instrumentation amplifier by encouraging Vg to follow VCM as closely as possible. Include any alterations to the design of Stage 1 of the instrumentation amplifier which are required to extract an estimate of the common-mode input voltage, VCM, to be used as input to the DRL circuit. C. i. For your new circuit, write down an expression for VCM - Vg in terms of VTH, ZTH, RL, and the magnitude of the gain of your DRL circuit. ii. If the capacitance between the ground (Vg) of the amplifier circuit and earth (0 V) is 1 pF, calculate the impedance Zg of this capacitance at the frequency of 60 Hz. iii. Assuming VTH and ZTH are the same as in part A above, that RL = 15 kΩ, and using your DRL design parameters from part B above, calculate the magnitude of the voltage difference, VCM - Vg, between the voltage on the body (VCM) and the voltage of the amplifier circuit ground (Vg).
Adi S.
Q3 / ( 25 Mark ) [ ONLY 5 ] 1- A 5-bit D/A converter produces VOUT = 0.2 V for a digital input of 0001. Find the value of Vout for an input of 11111. 2- A 5-bit DAC has a current output. For a digital input of 101000, an output current of 10mA is produced. What will IOUT be for a digital input of 11101? 3- Assume VREF = 10 V and R = R = 10 k_. Determine the resolution and full scale output for this DAC. Assume that RL is much smaller than R. 4- A certain 8-bit DAC has a full-scale output of 2mA and a full-scale error of ± 0.5% F.S. What is the range of possible outputs for an input of 10000000? 5- What is the largest value of output voltage from an 8-bit DAC that produces 1.0V for a digital input of 00110010? 6- Assume the following values for the ADC clock frequency = 1 MHz; VT = 0.1 mV; DAC has F.S. output = 10.23 V and a 10-bit input. Determine the following values. a. The digital equivalent obtained for VA = 3.728 V. b. The conversion time. c. The resolution of this converter.
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