2. Write a Verilog module that describes a 16-bit serial-in, serial-out right shift register with input SI (1-bit serial input), EN (enable), and CLK (clock, rising edge) and SO (1-bit serial output. LSB will be 1-bit output).
Added by Lauren A.
Close
Step 1
In this case, we have SI (serial input), EN (enable), CLK (clock), and SO (serial output). So, we can start by declaring these signals in the module: ```verilog module shift_register( input wire SI, input wire EN, input wire CLK, output wire SO ); ``` Show more…
Show all steps
Your feedback will help us improve your experience
Umar Sohail Qureshi and 92 other Physics 102 Electricity and Magnetism educators are ready to help you.
Ask a new question
Labs
Want to see this concept in action?
Explore this concept interactively to see how it behaves as you change inputs.
Key Concepts
Recommended Videos
Design a 4-bit shift register with the following specifications: - An asynchronous active-low clear (ClrN) - A rising-edge triggered clock (CLK) - An active-high load signal (Ld) with parallel data input (D) - A function select signal (S) - When S = 0, the register shifts right with a serial data input (SI) - When S = 1, the register shifts right with sign extension (copy the sign bit) a) Draw the logic symbol and a truth table for the 4-bit shift register. b) Write a complete VHDL model (entity and behavioral architecture) for the 4-bit shift register. c) Write a VHDL testbench for the 4-bit shift register. Simulate the shift register for the following test sequence: - Load 0011 - Shift right 3 times with S = 0 and SI = 1 - Shift right 2 times with S = 0 and SI = 0 - Clear - Load 1100 - Shift right 2 times with S = 1 and SI = 0
Sri K.
i. Write a behavioral model Verilog code for a Half-adder using an if-else statement. ii. Write a Verilog code for a Full-adder using a Test bench model.
Problem 6 (5 points) Write the Verilog code for a module of 64-bit ripple-carry adder. Problem 7 (5 points) Write a Verilog module with continuous assignments only to implement a 5-bit shifter. Problem 8 (10 points) Write the Verilog module for a three-digit BCD up-counter.
Recommended Textbooks
University Physics with Modern Physics
Physics: Principles with Applications
Fundamentals of Physics
Watch the video solution with this free unlock.
EMAIL
PASSWORD