Please create the following in any simulator:
Exercise #1: Design and simulate a 2-bit full adder using a 1-bit half adder shown in the figure and OR gates. Use bit switches as multiplexer inputs, data inputs, and bit displays to show the outputs.
4:1 MUX
Sum
So = B
S1 = A
4:1 MUX
Carry
Figure: 1-bit half adder using multiplexers