Address inputs 4 x 4 RAM Input data Word 0 BC BC BC BC Word 1 2x4 decoder BC BC BC BC Word 2 BC BC BC BC Memory enable EN Word 3 BC BC BC BC Read/Write Output data
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- It uses a 2x4 decoder to select one of the 4 words based on the address inputs. - Each bit in the word is stored in a bit cell (BC). - The memory enable (EN) signal activates the RAM. - The Read/Write signal determines whether data is being read from or written Show more…
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Y decoder 1-of-32 32 row lines 32 x 32 Memory array 32 column lines X decoder (Quad 1-of-8) A0 = 1 A1 = 0 A2 = 0 A3 = 1 A4 = 1 A5 = 1 A6 = 1 A7 = 1 S0 = 1 S1 = 1 Output buffers Q3 Q2 Q1 Q0 Figure 11-3 4) For the circuit of Figure 11-3, how many bits are contained in the output data word? A) 32 B) 3 C) 8 D) 4 5) What memory location is being addressed in Figure 11-3? A) 10111 B) 157 C) 5 D) 249 6) For the circuit in Figure 11-3, the value at the Q3 - Q0 outputs will be ________. A) 1024 B) 1111 C) 0000 D) 1001
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