Question 1 Design a counter which counts down, with the repeated sequence: 2, 1, 0, when the input to the counter circuit is 1. The counter doesn't count (stays at the same state) when the input is 0. The circuit is to be designed by treating the unused states as don't care conditions. Analyze the circuit obtained from the design to determine the effect of the unused states. Use T flip flops in your design. Question 2 5. Design a sequential circuit with two D flip flops, and two inputs, E and x. If E =0, the circuit remains in the same state regardless of the value of x. When E = 1 and x = 1, the circuit goes through the state transitions from 00 to 01 to 10 back to 00, and repeats. When E = 1 and x = 0, the circuit goes through the state transitions from 00 to 10 to 01 back to 00, and repeats. The circuit is to be designed by treating the unused state(s) as don't care condition(s). The final circuit must be analyzed to ensure that it is self-correcting. [25 points] Question 3 a. Design a counter with two JK flip flops (A and B) and an input (x) that counts 0 1 2 3 and repeat when x = 0 and counts 0 1 2 and repeat when x = 1. Design this assuming that x never is 1 when the count is 3. Show the minimum equations for each. b. What does happen when x goes to 1 when the count is 3?
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Q1. Modify an SR Flip-Flop with negative rolne edge to operate as a JK Flip-Flop with positive going edge. Q2. Suggest a circuit that has the following characteristics: When just one of the inputs {a, b, c} is 1, the circuit output Q is SET. When all inputs {a, b, c} are 0's, the output is RESET. Otherwise, the output Q remains UNCHANGED. Hint: Use an SR Flip-Flop and try to find the equations that describe the inputs S and R. Q3. Repeat Q2 using a T-Flip-Flop. Q4. Plot the output waveform Q for a JK Flip-Flop with positive going edge. Does it have any difference if you consider the initial value of Q-1 or Q-0? Clk Q5. Repeat Q4 with a negative going edge flip-flop.
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