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Problem 4. Suppose we do unsigned division. The division hardware has a 13-bit dividend register which is initially loaded with the 12-bit dividend, 0111 1101 1100, in the lower 12 bits. A 6-bit divisor register holds the divisor, 110110. Upon completion of the division process the resulting 6-bit quotient, Q, and 6-bit remainder, R, are in the dividend register. (a) Use the restoring division algorithm. Show the contents of the 13-bit dividend register and the 6-bit divisor register at each iteration of the division process. (b) Use the nonrestoring division algorithm. Show the contents of the 13-bit dividend register and the 6-bit divisor register at each iteration of the division process.

          Problem 4. Suppose we do unsigned division. The division hardware has a 13-bit dividend register which is initially loaded with the 12-bit dividend, 0111 1101 1100, in the lower 12 bits. A 6-bit divisor register holds the divisor, 110110. Upon completion of the division process the resulting 6-bit quotient, Q, and 6-bit remainder, R, are in the dividend register. (a) Use the restoring division algorithm. Show the contents of the 13-bit dividend register and the 6-bit divisor register at each iteration of the division process. (b) Use the nonrestoring division algorithm. Show the contents of the 13-bit dividend register and the 6-bit divisor register at each iteration of the division process.

Problem 4. Suppose we do unsigned division. The division hardware has a 13-bit dividend register which is initially loaded with the 12-bit dividend, 0111 1101 1100, in the lower 12 bits. A 6-bit divisor register holds the divisor, 110110. Upon completion of the division process the resulting 6-bit quotient, Q, and 6-bit remainder, R, are in the dividend register. (a) Use the restoring division algorithm. Show the contents of the 13-bit dividend register and the 6-bit divisor register at each iteration of the division process. (b) Use the nonrestoring division algorithm. Show the contents of the 13-bit dividend register and the 6-bit divisor register at each iteration of the division process.

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