Q2 draw a diagram of a bus system using three state buffers and decoder instead of the multiplexers. Bus System for four Registers
Bus System for four Registers
4-line common bus
S1 So
41 MUX 3 2
4x1 MUX 2
4x1 MUX 1
41 MUX 0
D
C2
B2
A
D1
C
B
Do
Cp
Bo
3
2
1
-
3
2
1
0
3
2
1
0
3
2
1
Register D
Register C
Register B
Register4