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Question 1 (a) Implement a Full Adder using 4:1 multiplexer (4-bit MUX) (b) Propose a circuit to add five 1-bit numbers, D, E, F, G and H, using a Half Adder and two Full Adders. (c) Using an FA (input carry bit Ci), AND and OR logic gates and inverter, and two select inputs, S0 and S1, design a logic circuit that can perform the operations given in Table 1. S1 S0 | Ci = 0 | Ci = 1 00 | F = A + B (addition) | F = A + B + 1 01 | F = A (transfer) | F = A + 1 10 | F = B? (inversion) | F = B? + 1 (negation) 11 | F = A + B? | F = A + B? + 1 (subtraction) Figure 1: Arithmetic operation

          Question 1
(a) Implement a Full Adder using 4:1 multiplexer (4-bit MUX)
(b) Propose a circuit to add five 1-bit numbers, D, E, F, G and H, using a Half Adder
and two Full Adders.
(c) Using an FA (input carry bit Ci), AND and OR logic gates and inverter, and two
select inputs, S0 and S1, design a logic circuit that can perform the operations
given in Table 1.
S1 S0 | Ci = 0 | Ci = 1
00 | F = A + B (addition) | F = A + B + 1
01 | F = A (transfer) | F = A + 1
10 | F = B? (inversion) | F = B? + 1 (negation)
11 | F = A + B? | F = A + B? + 1 (subtraction)
Figure 1: Arithmetic operation

Question 1
(a) Implement a Full Adder using 4:1 multiplexer (4-bit MUX)
(b) Propose a circuit to add five 1-bit numbers, D, E, F, G and H, using a Half Adder
and two Full Adders.
(c) Using an FA (input carry bit Ci), AND and OR logic gates and inverter, and two
select inputs, S0 and S1, design a logic circuit that can perform the operations
given in Table 1.
S1 S0 | Ci = 0 | Ci = 1
00 | F = A + B (addition) | F = A + B + 1
01 | F = A (transfer) | F = A + 1
10 | F = B? (inversion) | F = B? + 1 (negation)
11 | F = A + B? | F = A + B? + 1 (subtraction)
Figure 1: Arithmetic operation

Added by Erica H.

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