Shown below is the block diagram for a byte addressable memory system that employs 32-bit memory addresses and contains two memory modules. Both memory modules have a width of 32 bits and a depth of 536,870,912 cells. The cells within each memory module are numbered starting from 0. The bytes within each cell are numbered starting from 0 for the most significant byte (the leftmost byte).
Answer each of the following questions about this system:
f) Assume that the 32-bit pattern 0xCAFEF00D is contained in the memory cell that is accessed by the instructions:
lui $4,16384
lb $4,-3($4)
Use hex to show the bit pattern that is placed on the data bus when these instructions are executed.
g) (3) Use hex to show the 32-bit memory address of the data byte that is placed into $4 by the instruction sequence:
lui $4,16384
lb $4,-3($4)
[Diagram]
Address bus
A3i
CS Memory Module A
CS Memory Module B
CPU
Data bus
