00:01
Hello, in this question since we have the table, we will make the table.
00:07
So, the logic diagram first of all here would be like this we have 4, 2 this is da, this is qa, this is qa dash, this is qb, this is db, qb dash, we have here like this right, this is clock right and now since this is connected like this z, so here we have, here also we have, so there are like this 2 and this, this is connected here, here also we have the same circuit, one of the input is passing like this, the second and the second 2 of this right.
01:39
So, this one directly goes to this, this one directly goes to this right, this 2 are connected mutually, this is connected here, the not gate of y, here we have x which is going straight like this and we have one of this here and we have one of this here.
02:29
So, this is the circuit right, the table that will make, so where we have a, b, x, y, d, a of t plus 1, b of t plus 1 that means next state and the output z right...