This problem requires you to design a module with five input bits m, x1, x0, y1, y0 and four output bits z3, z2, z1, z0. Bits x1, x0 are interpreted as a 2-bit binary number X. For example, if x1 = 1 and x0 = 0, then X = x1x0 = 10 = 2. On the other hand, if m (or mode bit) decides whether your logic works as an adder or a multiplier as described below.
Adder mode (m = 1): Here the output z3z2z1z0 is a 4-bit number Z that represents the arithmetic sum X + Y. For example, if X = 2 and Y = 3, then when m = 1, the circuit will output Z = X + Y = 2 + 3 = 5 = 0101 = z3z2z1z0; that is, z2 = z0 = 1 and z3 = z1 = 0.
Multiplier mode (m = 0): Here the output z3z2z1z0 is a 4-bit number Z that represents the arithmetic product X Y. For example, if X = 2 and Y = 3, then when m = 0, the circuit will output Z = X Y = 2 3 = 6 = 0110 = z3z2z1z0; that is, z2 = z1 = 1 and z3 = z0 = 0.
(a) Draw a truth table for the functions z3(m, x1, x0, y1, y0), z2(m, x1, x0, y1, y0), z1(m, x1, x0, y1, y0), and z0(m, x1, x0, y1, y0) described above. To keep things clear, split the truth table into two 4-variable truth tables, one for m = 0 and the other for m = 1.
(b) Use 5-variable Karnaugh maps to derive minimal SOP forms for z3, z2, z1, z0.
(c) Draw a circuit for the hardware module in this problem.