Question

Question 1 A dual slope A/D converter shown in figure has $V_{REF} = 5.12$ V, and an N-bit counter that outputs N-bit representation of the input signal. A 2 MHz clock is used for the clock and counter circuits. [20] - $V_{in}$ $V_{REF}$ CO3 (a) Determine the input voltage range. If step size is 0.02 V, determine the total number [7] of steps and the number of bits used in this ADC. CO3 (b) For input voltage, $V_{in} = 3$ V, determine the ADC output count. Calculate the time [7] required to get this output. CO3 (c) Draw $V_o$ vs time graph for the input voltage $V_{in}$ mentioned in (b). If $V_{in} = 4V$, how [6] the graph will change? Explain briefly.

          Question 1
A dual slope A/D converter shown in figure has $V_{REF} = 5.12$ V, and an N-bit counter that outputs
N-bit representation of the input signal. A 2 MHz clock is used for the clock and counter circuits. [20]
- $V_{in}$
$V_{REF}$
CO3 (a) Determine the input voltage range. If step size is 0.02 V, determine the total number [7]
of steps and the number of bits used in this ADC.
CO3 (b) For input voltage, $V_{in} = 3$ V, determine the ADC output count. Calculate the time [7]
required to get this output.
CO3 (c) Draw $V_o$ vs time graph for the input voltage $V_{in}$ mentioned in (b). If $V_{in} = 4V$, how [6]
the graph will change? Explain briefly.

Question 1
A dual slope A/D converter shown in figure has VREF = 5.12 V, and an N-bit counter that outputs
N-bit representation of the input signal. A 2 MHz clock is used for the clock and counter circuits. [20]
- Vin
VREF
CO3 (a) Determine the input voltage range. If step size is 0.02 V, determine the total number [7]
of steps and the number of bits used in this ADC.
CO3 (b) For input voltage, Vin = 3 V, determine the ADC output count. Calculate the time [7]
required to get this output.
CO3 (c) Draw Vo vs time graph for the input voltage Vin mentioned in (b). If Vin = 4V, how [6]
the graph will change? Explain briefly.

Added by Jeremy A.

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