Question

C.3 (a) A ROM is used to implement the Boolean functions given below. Yo = A.B.C.D + A.B.C.D + A.B.C.D Y? = (A+B). (A+B+C) Yo = ?m (13,15) (i) Find the maximum size of the ROM required. (1 mark) (ii) Implement the ROM circuit using a 4-to-16 active high decoder. Show the connections and labels clearly. (5 marks) (b) Implement a combinational logic circuit design of a full adder by using encoder and 2- inputs NAND gate only. (4 marks)

          C.3 (a) A ROM is used to implement the Boolean functions given below.
Yo = A.B.C.D + A.B.C.D + A.B.C.D
Y? = (A+B). (A+B+C)
Yo = ?m (13,15)
(i) Find the maximum size of the ROM required.
(1 mark)
(ii) Implement the ROM circuit using a 4-to-16 active high decoder. Show the
connections and labels clearly.
(5 marks)
(b) Implement a combinational logic circuit design of a full adder by using encoder and 2-
inputs NAND gate only.
(4 marks)

C.3 (a) A ROM is used to implement the Boolean functions given below.
Yo = A.B.C.D + A.B.C.D + A.B.C.D
Y? = (A+B). (A+B+C)
Yo = ?m (13,15)
(i) Find the maximum size of the ROM required.
(1 mark)
(ii) Implement the ROM circuit using a 4-to-16 active high decoder. Show the
connections and labels clearly.
(5 marks)
(b) Implement a combinational logic circuit design of a full adder by using encoder and 2-
inputs NAND gate only.
(4 marks)

Added by Benjamin H.

Computer Science and Information Technology

Trishna Knowledge Systems 2018 Edition

Instant Answer

Solved by Expert Luke Humphrey

Step 1

In the given expression Y = A.B.C.D + A.B.C.D + A.B.C.D, we have 4 variables A, B, C, and D. Each variable can take on 2 possible values (0 or 1). So, the total number of possible combinations of A, B, C, and D is 2^4 = 16. Therefore, the maximum size of the Show more…

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Y = A.B.C.D + A.B.C.D + A.B.C.D Y = A + B.(A + B + C) Y = m13,15 (i) Find the maximum size of the ROM required (1 mark) (ii) Implement the ROM circuit using a 4-to-16 active high decoder. Show the connections and labels clearly (5 marks) (iii) Implement a combinational logic circuit design of a full adder by using an encoder and 2-input NAND gate only.