Computer Science and Information Technology

Trishna Knowledge Systems

Chapter 6

Computer Organization and Architecture - all with Video Answers

Educators

Section 1

Machine Instructions, Addressing Modes

Problem 1

An instruction is stored at location 301 with its address field at location 300 . The address field has the value 400. A processor register $R$, contains the number 200 . Evaluate the effective address and Match the following:
(A) Direct
(1) 702
(B) Immediate
(2) 600
(C) Relative
(3) 301
(D) Register Indirect
(4) 400
(E) Index with $R_{1}$ as index
(5) $\quad 200$
Register (A) $\mathrm{A}-4, \mathrm{~B}-3, \mathrm{C}-1, \mathrm{D}-5, \mathrm{E}-2$
(B) $\mathrm{A}-3, \mathrm{~B}-4, \mathrm{C}-1, \mathrm{D}-5, \mathrm{E}-2$
(C) $\mathrm{A}-4, \mathrm{~B}-3, \mathrm{C}-1, \mathrm{D}-2, \mathrm{E}-5$
(D) $\mathrm{A}-3, \mathrm{~B}-3, \mathrm{C}-1, \mathrm{D}-2, \mathrm{E}-5$

James Kiss

James Kiss

Numerade Educator

Problem 2

The two word instruction is stored in memory at an address designated by symbol $W .$ The address field of the instruction (stored at $W+1$ ) is designated by the symbol $Y$. The operand used during the execution of the instruction is stored at address symbolized by $Z$. An index register contains the value $X$. State how $Z$ is calculated from the other addresses if the addressing mode of the instruction is
(A) Direct
(1) $Z=\operatorname{Mem}(Y)$
(B) Indirect
(2) $\quad Z=Y+W+2$
(C) Relative
(3) $Z=Y+X$
(D) Indexed
(4) $\quad Z=Y$
(A) $\mathrm{A}-4, \mathrm{~B}-1, \mathrm{C}-2, \mathrm{D}-3$
(B) $\mathrm{A}-3, \mathrm{~B}-1, \mathrm{C}-2, \mathrm{D}-4$
(C) $\mathrm{A}-4, \mathrm{~B}-2, \mathrm{C}-1, \mathrm{D}-3$
(D) $\mathrm{A}-3, \mathrm{~B}-2, \mathrm{C}-1, \mathrm{D}-4$

James Kiss

Numerade Educator

Problem 3

A computer has 32 -bit instruction and 12 -bit addresses. If there are 250 two-address instructions, how many one-address instructions can be formulated?
(A) 6
(B) 256
(C) 12,288
(D) 24,576

Narayan Hari

Numerade Educator

Problem 4

The memory unit of a computer has $256 \mathrm{k}$ words of 32 -bits each. The computer has an instruction format with four fields:
1. An operation field
2. A mode field to specify one of 8 addressing modes
3. A Register address field to specify one of 120 processor registers.
4. A memory address.
Then what is the number of bits in each field respectively if the instruction is in one memory word?
(A) $4,3,7,18$
(B) $3,4,7,18$
(C) $2,1,6,23$
(D) $3,7,4,18$

James Kiss

Numerade Educator

Problem 5

A relative mode branch type of instruction is stored in memory at an address equivalent to decimal 750 . The branch is made to an address equivalent to decimal 400 .
What should be the value of the relative address ficld of the instruction in decimal?
(A) 351
(B) $-351$
(C) 350
(D) $-350$

James Kiss

Numerade Educator

Problem 6

A relative mode branch type of instruction is stored in memory at an address equivalent to decimal 750 . The branch is made to an address equivalent to decimal 400 .
The relative address value in binary using 12 -bits, will be
(A) 000101011111
(B) 100101011111
(C) 111010100000
(D) 111010100001

James Kiss

Numerade Educator

Problem 7

A relative mode branch type of instruction is stored in memory at an address equivalent to decimal 750 . The branch is made to an address equivalent to decimal 400 .
What will be the binary value in $\mathrm{PC}$ after the fetch phase (in binary)?
(A) 001011101111
(B) 001011101110
(C) 111011101111
(D) 110100010001

James Kiss

Numerade Educator

Problem 8

What will be the effective address and operand to be loaded by using Register indirect mode?
(A) 200,400
(B) 400,1000
(C) 400,500
(D) 200,1000

James Kiss

Numerade Educator

Problem 9

What will be the effective address using indirect addressing mode?
(A) 200
(B) 201
(C) 500
(D) Present in 500 location

James Kiss

Numerade Educator

Problem 10

What will be the effective address using immediate addressing mode?
(A) 202
(B) 201
(C) 500
(D) 400

Vysakh M

Numerade Educator

Problem 11

A CPU of a computer has 48 -bit instructions. A program starts at address $(600)_{10^{-}}$ Which one of the following is a legal program counter value in decimal?
(A) 610
(B) 650
(C) 672
(I)) 693

James Kiss

Numerade Educator

Problem 12

Consider a new instruction named branch- on-bit-reset (bbr). The instruction ' $B B R R_{1}, I$, label' Jumps to label, and if bit in position I of register operand, $R_{1}$ is zero. The registers of the computer are 16 -bits wide and are numbered 0 to 15 , position 0 being LSB. Consider the following implementation of this instruction on a processor that does not have $B B R$ implemented.
Temp $\leftarrow R_{1}$ and mask Branch to label if temp is zero.
The variable 'temp' is a temporary register. For correct implementation, the variable 'mask' must be generated by
(A) mask $\leftarrow 0 \times 1<<I$
(B) mask $\leftarrow 0 \times$ FFFFFFFF $\gg I$
(C) mask $\leftarrow I$
(D) mask $\leftarrow 0 \times F$.

James Kiss

Numerade Educator

Problem 13

Consider a hypothetical processor with an instruction of type
LW $R_{1}, 40\left(R_{2}\right)\left(R_{3}\right)$.
Which during execution reads a 16 -bit word from memory and stores it in a 16 -bit register $R_{1} .$ The effective address of the memory location is obtained by the addition of constant 40 , contents of $R_{2}$ and $R_{3}$ registers. Which of the following best reflects the addressing mode implemented by this instruction for the operand in memory?
(A) Immediate addressing
(B) Register addressing
(C) Register indirect scaled addressing
(D) Base with index and displacement addressing

James Kiss

Numerade Educator

Problem 14

Which of the following is true of base-register addressing mode?
(i) It is useful in creating self-relocating code.
(ii) If it is included in an instruction set architecture, then an additional ALU is required for effective address calculation.
(iii) The amount of displacement depends on the content of base register.
(A) (i) only
(B) (ii) only
(C) (i) and (ii) only
(D) (ii) and (iii) only

James Kiss

Numerade Educator

Problem 15

Which of the following addressing modes are suitable for program relocation at run time?
(i) Direct addressing
(ii) Based register addressing
(iii) $\mathrm{PC}$ -relative addressing
(iv) Index register addressing
(A) (i) and (ii)
(B) (ii) and (iii)
(C) (iii) and (iv)
(D) (ii), (iii) and (iv)

James Kiss

Numerade Educator

Problem 16

In which of the following addressing mode, the address of the operand is inside the instruction?
(A) Implied mode
(B) Absolute addressing mode
(C) Immediate addressing mode
(D) Rcgister addressing mode

James Kiss

Numerade Educator

Problem 17

A certain processor supports only the immediate and the direct addressing modes. Which of the following programming language features can be on this processor?
(i) Pointers
(ii) Arrays
(iii) Initialization
(A) (i) and (ii)
(B) (i) and (iii)
(C) (ii) and (iii)
(D) (iii) only

James Kiss

Numerade Educator

Problem 18

In which of the following situation, relative addressing mode is useful?
(A) Coroutine writing
(B) Position-independent code writing
(C) Sharable code writing
(D) Interrupt handlers

James Kiss

Numerade Educator

Problem 19

In indexed addressing mode with scaling, the effective address is calculated as
(A) Index $+$ scaling $+$ signed displacement
(B) (Index $*$ scaling) $+$ signed displacement
(C) Index $+$ (scaling * displacement)
(D) (Index + scaling) * displacement

James Kiss

Numerade Educator

Problem 20

Which of the following addressing modes require more number of memory accesses?
(A) DIRECT
(B) IMMEDIATE
(C) INDIRECT
(I) IMPLIFI)

James Kiss

Numerade Educator