Chapter Questions
In Fig. 8-1, $m=20, E_1=0.2 \mathrm{~V}$, and $E_2=0.25 \mathrm{~V}$. Find $V_o$.
If $V_o=10 \mathrm{~V}$ in Fig. 8-1, $E_1=7.5 \mathrm{~V}$, and $E_2=7.4 \mathrm{~V}$, find $m$.
If $E_{c m}=5.0 \mathrm{~V}$ in Fig. 8-2a, find $V_o$.
For the differential amplifier circuit of Fig. 8-2(b), all the resistors are equal to $10 \mathrm{k} \Omega$ except $R_2$, which is mismatched by $5 \Omega\left(R_2=10 \mathrm{k} \Omega+5 \Omega\right)$. What is the common mode rejection of the circuit?
Design the differential amplifier circuit of Fig. 8-2(b) for a gain of 4. The input resistors $R_1$ and $R_3$ are equal to $25 \mathrm{k} \Omega$.
A circuit has a common-mode rejection ratio of 100,000 . What is the common-mode rejection?
A circuit has a CMR of $75 \mathrm{~dB}$. What is the common-mode rejection ratio?
In Fig. 8-3, $E_i=2 \mathrm{mV}$ and $E_n=50 \mathrm{mV}$. What is the output voltage due to (a) $E_i$; (b) $E_n$ ?
In Fig. 8-4, $E_i=2 \mathrm{mV}$ and $E_n=50 \mathrm{mV}$. What is the output voltage due to (a) $E_i$; (b) $E_n$ ?
What is the main advantage of a differential amplifier over an inverting amplifier with respect to an input noise signal voltage?
Find $V_o$ in Fig. 8-5(b) if $E_1=-5 \mathrm{~V}$ and $E_2=-3 \mathrm{~V}$.
In Fig. 8-5(b), $R=10 \mathrm{k} \Omega$ and $a R=2 \mathrm{k} \Omega$. If $E_3=1.5 \mathrm{~V}$ and $E_2=0.5 \mathrm{~V}$, find $V_o$.
In Fig. 8-6 the overall gain is 21 and $V_o=3 \mathrm{~V}$. Determine (a) $E_1-E_2$; (b) $a$.
In Fig. 8-6, $R=25 \mathrm{k} \Omega, a R=100 \Omega, E_1=1.01 \mathrm{~V}$, and $E_2=1.02 \mathrm{~V}$. Find $V_o$.
If $V_{\text {ref }}=5.0 \mathrm{~V}$ in Fig. 8-7, find (a) $V_o$; (b) the voltage at the (+) input with respect to ground.
Refer to the circuit of Fig. P8-16. Complete the table below for each input condition.$$\begin{array}{lrrrrr}\hline & E_1(\mathrm{~V}) & E_2(\mathrm{~V}) & E_3(\mathrm{~V}) & V_o & V \text { at }(+) \text { input } \\\hline \text { (a) } & -2 & -2 & 0 & \\\text { (b) } & -2 & -2 & 2 & \\\text { (c) } & 2 & -2 & -2 & \\\text { (d) } & 2 & 0 & 2 & \\\hline\end{array}$$
Refer to the voltage-to-current converter of Fig. 8-10. Assume that the AD524 is wired for a gain of 1 [no wires on pins 13 and 3]. The load current is now $I_L=\left(E_1-E_2\right) / R_s$. Let $R_s=$ $1 \mathrm{k} \Omega, E_2=0 \mathrm{~V}$ or ground, and $E_1=1 \mathrm{~V}$. (a) Will the direction of $I_L$ be up or down in Fig. 8-10? (b) Find $I_L$. (c) Find the voltage across $R_L$ if $R_L=100 \Omega$. (d) Find the output voltage of the IA $\left(V_9\right)$ if $R_L=3 \mathrm{k} \Omega$.
Repeat Problem 8-17 except change $E_2=$ ground and $E_1=1 \mathrm{~V}$. (Note that Section 8-5.3 tells you how to make an ac voltage-controlled current source for a grounded load.)
Change $E_1$ to $-1 \mathrm{~V}$ in Problem 8-17. (a) Would $V_o$ be positive or negative with respect to ground? (b) Would $V_o$ decrease or increase in magnitude as temperature increased?
In Fig. 8-16, the value for $R=120.00 \Omega, \Delta R=1.2 \mathrm{~m} \Omega$, and $E=10.0 \mathrm{~V}$. Find $\left(E_1-E_2\right)$ for the strain-gage arrangement of (a) Fig. 8-16(a); (b) Fig. 8-16(b); (c) Fig. 8-16(c).
Assume that an IA with a gain of 1000 is wired to the bridges of Problem 8-20. Find $V_o$ for each of the three bridge arrangements.
Consider a gage factor of 2 in Problems 8-20 and 8-21 and calculate $\Delta L / L$ for each bridge arrangement.
Refer to Section 8-12.3. To gain experience with this type of bridge circuit, repeat Design Example 8-13 (except change only your reference temperature to $50^{\circ} \mathrm{C}$. $R_1$ remains at $10 \mathrm{k} \Omega$ and $E=1 \mathrm{~V}$ ). Present your solution in the same format as shown in Table 8-2 and Fig. 8-19. Redraw the new design schematic like that of Fig. 8-19. [Remember that $R_{\text {ref }}$ will now be $3603 \Omega$ so that $I=1 \mathrm{~V} /(10,000+3603) \Omega=73.51 \mu \mathrm{A}$.]
You want a circuit that has an increasing magnitude of output voltage as temperature of a thermistor increases. You put the thermistor in the feedback loop [see Fig. 8-18(b)]. Would you choose $R_{\text {ref }}$ at the low or the high end of the temperature scale? (Hint: Compare $V_o$ vs. $V_T$ of Design Example 8-13 with the solution of Problem 8-23.) This problem forces you to face briefly the issue of "human engineering." People want to see an increasing voltage as temperature increases.