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Principles and Applications of Electrical Engineering

Giorgio Rizzoni, James Kearns

Chapter 11

Digital Logic Circuits - all with Video Answers

Educators

Chapter Questions

Problem 1

Convert the following base-10 numbers to hexadecimal and binary:
a. 303
b. 275
c. 18 d .43
e. 87

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05:00

Problem 2

Convert the following hexadecimal numbers to base-10 and binary:
a. C'
b. 44 c 28
d. 59
e. 14

Aaron Goree
Aaron Goree
Numerade Educator
08:34

Problem 3

Convert the following base- 10 numbers to binary:
a. 231.45
b. 58.78
c. 21.22
e. 93.375

Page 692

Bryan Lynn
Bryan Lynn
Numerade Educator

Problem 4

Convert the following binary numbers to hexadecimal and base 10 :
a. 1101
b. 1000100
c. 1111100
d. 1110000
e. 10000
f. 101010

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Problem 5

Perform the following additions, all in the binary system:
a. $10101111+10100$
b. $111100001+111000$
c. $111001011+111001$

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Problem 6

Perform the following subtractions, all in the binary system:
a. $11010001-11100$
b. $11111100-101010$
c. $100110110-1001100$

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Problem 7

Assuming that the most significant bit is the sign bit, find the decimal value of the following sign-magnitude form 8-bit binary numbers:
a. 10100111
b. 01010110
c. 11111100

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01:35

Problem 8

Find the sign-magnitude form binary representation of the following decimal numbers:
a. 122
b. -110 c. -87 d. 40

Nick Johnson
Nick Johnson
Numerade Educator
03:08

Problem 9

Find the twos complement of the following binary numbers:
a. 1110
b. 1100101
c. 1110000
d. 11100

Aaron Goree
Aaron Goree
Numerade Educator
01:55

Problem 10

Using 10 fingers, including thumbs:
a. How high can one count in a binary (base 2 ) number system?
b. How high can one count in base 6 , using one hand to count units and the other hand for carries?

Averell Hause
Averell Hause
Carnegie Mellon University
02:40

Problem 11

Use a truth table to show that

$$
\bar{A}+A B=\bar{A}+B .
$$

M Hassan Anwar
M Hassan Anwar
Numerade Educator

Problem 12

Realize the logic function:

$$
Y=(A+\bar{B}) \cdot(\bar{C} \cdot D)+A
$$

using logic gates and construct its truth table.

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04:14

Problem 13

Using the method of proof by perfect induction, show that

$$
(X+Y) \cdot(\bar{X}+X \cdot Y)=Y
$$

AG
Ankit Gupta
Numerade Educator

Problem 14

Simplify the expression

$$
Y=\bar{A} \cdot \bar{B} \cdot C+\bar{A} \cdot B \cdot C+\bar{A} \cdot \bar{C}
$$

using boolean algebra, and then draw the logic circuit using logic gates.

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Problem 15

Simplify the expression

$$
Y=A \cdot \bar{B} \cdot \bar{C}+A \cdot \bar{B} \cdot C+\bar{A} \cdot B \cdot C+A \cdot B \cdot C
$$

using the boolean algebra.

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09:41

Problem 16

Simplify the expression

$$
Y=\bar{A} \cdot \bar{B} \cdot \bar{C}+\bar{A} \cdot \bar{B} \cdot C+\bar{A} \cdot B \cdot \bar{C}
$$

using the boolean algebra.

Kanak Aggarwal
Kanak Aggarwal
Numerade Educator

Problem 17

Find a logic function equivalent to the truth table given in Figure P11.17.
$$
\begin{array}{ccc|c}
\hline \boldsymbol{A} & \boldsymbol{B} & \boldsymbol{C} & \boldsymbol{F} \\
\hline 0 & 0 & 0 & 0 \\
0 & 0 & 1 & 1 \\
0 & 1 & 0 & 0 \\
0 & 1 & 1 & 1 \\
1 & 0 & 0 & 1 \\
1 & 0 & 1 & 1 \\
1 & 1 & 0 & 1 \\
1 & 1 & 1 & 1 \\
\hline
\end{array}
$$
Figure P11.17

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Problem 18

Determine the boolean function describing the operation of the circuit shown in Figure P11.18 and simplify it using boolean algebra.
Figure can't copy

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Problem 19

Use a truth table to show when the output of the circuit of Figure P11.19 is 1.
Figure can't copy

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Problem 20

Baseball is a complicated game, and often the manager has a difficult time keeping track of all the rules of thumb that guide decisions. To assist your favorite baseball team, you have been asked to design a logic circuit that will flash a light when the manager should give the steal sign. The rules have been laid out for you by a baseball fan with limited knowledge of the game as follows: Give the steal sign if there is a runner on first base and
a. There are no other runners, the pitcher is right-handed, and the runner is fast; or
b. There is one other runner on third base, and one of the runners is fast; or
c. There is one other runner on second base, the pitcher is left-handed, and both runners are fast.

Under no circumstances should the steal sign be given if all three bases have runners. Design a logic circuit that implements these rules to indicate when the steal sign should be given.

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02:49

Problem 21

A small county board is composed of three commissioners. Each commissioner votes on measures presented to the board by pressing a button indicating whether the commissioner votes for or against a measure. If two or more commissioners vote for a measure, it passes. Design a logic circuit that takes the three votes as inputs and lights either a green or a red light to indicate whether a measure passed.

Sriram Soundarrajan
Sriram Soundarrajan
Numerade Educator

Problem 22

A water purification plant uses one tank for chemical sterilization and a second, larger tank for settling and aeration. Each tank is equipped with two sensors that measure the height of water in each tank and the flow rate of water into each tank. When the height of water or the flow rate is too high, the sensors produce a logic high output. Design a logic circuit that sounds an alarm whenever the height of water in both tanks is too high and either of the flow rates is too high, or whenever both flow rates are too high and the height of water in either tank is also too high.

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Problem 23

Many automobiles incorporate logic circuits to alert the driver to problems or potential problems. In one particular car, a buzzer is sounded whenever the ignition key is turned and either a door is open or a seat belt is not fastened. The buzzer also sounds when the key is not turned but the lights are on. In addition, the car will not start unless the key is in the ignition, the car is in park, and all doors are closed and seat belts fastened. Design a logic circuit that takes all the inputs listed and sounds the buzzer and starts the car when appropriate.

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Problem 24

An on/off start-up signal governs the compressor motor of a large commercial air conditioning unit. In general, the start-up signal should be on whenever the output of a temperature sensor $S$ exceeds a reference temperature. However, you are asked to limit the compressor start-ups to certain hours of the day and also enable service technicians to start up or shut down the compressor through a manual override. A time-of-day indicator $D$ is available with on/off outputs, as is a manual override switch $M$. A separate timer $T$ prohibits a compressor start-up within 10 min of a previous shutdown. Design a logic diagram that incorporates the state of all four devices ( $S, D, M$, and $T$ ) and produces the correct on/off condition for the motor start-up.

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Problem 25

NAND gates require one less transistor than AND gates. They are often used exclusively to construct logic circuits. One such logic circuit that uses threeinput NAND gates is shown in Figure P11.25.
a. Determine the truth table for this circuit.
b. Find a logic function that represents the circuit.
Figure can't copy

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Problem 26

Draw a logic circuit that is equivalent to the function:

$$
F=(A+\bar{B}) \cdot(\overline{C+\bar{A}}) \cdot B
$$

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Problem 27

The circuit shown in Figure P11.27 is called a half adder for two single bit inputs, giving a two-bit sum as outputs. Build a truth table and verify that it indeed acts as a summer.
Figure can't copy

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Problem 28

Draw a logic circuit that is equivalent to the function:

$$
F=\mid(A+C \cdot \bar{B})+A \cdot \bar{B} \cdot \bar{C}] \cdot \overline{(B+C)}
$$

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Problem 29

Determine the truth table ( $F$ given $A, B, C$, and $D$ ) and a logical expression for the circuit of Figure P11.29.
Figure can't copy

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Problem 30

Determine the truth table ( $F$ given $A, B$, and $C$ ) and a logical expression for the circuit of Eigure P11.30.
Figure can't copy

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Problem 31

A "vote taker" logic circuit forces its output to agree with a majority of its inputs. Such a circuit is shown in Figure P11.31 for the three voters, $A, B$ and C. Write a logic expression for the output of this circuit in terms of its inputs. Also create the truth table for the output in terms of the inputs.
Figure can't copy

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Problem 32

A "consensus indicator" logic circuit is shown in Figure P11.32. Write a logical expression for the output of this circuit in terms of its input. Also create the truth table for the output in terms of the inputs.
Figure can't copy

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Problem 33

A half-adder circuit is shown in Eigure P11.33. Write a logical expression for the outputs of this circuit in terms of its inputs. Also create the truth table for the outputs in terms of the inputs.
Figure can't copy

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Problem 34

For the logic circuit shown in Eigure P11.34, write a logical expression for the outputs of this circuit in terms of its inputs, and create the truth table for the outputs in terms of the inputs, including any required intermediate variables.
Figure can't copy

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Problem 35

For the logic circuit in Eigure P11.35, write a logical expression for the outputs of this circuit in terms of its inputs, and create the truth table for the Page 695 outputs in terms of the inputs, including any required intermediate variables.
Figure can't copy

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Problem 36

Simplify the following logic function:

$$
f(A, B, C)=(A+B) \cdot A \cdot B+\bar{A} \cdot C+A \cdot \bar{B} \cdot C+\bar{B} \cdot \bar{C}
$$

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Problem 37

Complete the truth table for the circuit of Figure P11.37.
a. What mathematical function does this circuit perform, and what do the outputs signify?
b. How many standard 14 -pin ICs would it take to construct this circuit?
Figure can't copy

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Problem 38

Find the logic function corresponding to the truth table of Figure P11.38 in the simplest SOP form.
$$
\begin{array}{ccc|c}
\hline \boldsymbol{A} & \boldsymbol{B} & \boldsymbol{C} & \boldsymbol{F} \\
\hline 0 & 0 & 0 & 1 \\
0 & 0 & 1 & 0 \\
0 & 1 & 0 & 0 \\
0 & 1 & 1 & 0 \\
1 & 0 & 0 & 1 \\
1 & 0 & 1 & 0 \\
1 & 1 & 0 & 1 \\
1 & 1 & 1 & 1 \\
\hline
\end{array}
$$
Figure P11.38

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Problem 39

Find the minimum expression for the output of the logic circuit shown in Figure P11.39.
Figure can't copy

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Problem 40

Build the Karnaugh map of the function $Y=\overline{A \cdot B \cdot C}$ and verify it using boolean algebra.

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Problem 41

Use a Karnaugh map to minimize the function $Y=\bar{C} \cdot \bar{B} \cdot A+\bar{C} \cdot B \cdot \bar{A}+\bar{C} \cdot \bar{B} \cdot \bar{A}$

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Problem 42

Fill in the Karnaugh map for the function $Y=f(A, B, C)$ defined by the truth table of Figure P11.42, and find the minimum expression for the function.
$$
\begin{array}{ccc|c}
\hline \boldsymbol{A} & \boldsymbol{B} & \boldsymbol{C} & \boldsymbol{Y} \\
\hline 0 & 0 & 0 & 0 \\
0 & 0 & 1 & 0 \\
0 & 1 & 0 & 1 \\
0 & 1 & 1 & 1 \\
1 & 0 & 0 & 1 \\
1 & 0 & 1 & 1 \\
1 & 1 & 0 & 0 \\
1 & 1 & 1 & 0 \\
\hline
\end{array}
$$
Figure P11.42

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Problem 43

A function $F$ is defined such that it equals 1 when a 4-bit input code is equivalent to any of the decimal numbers $3,6,9,12$, or 15 . Function $F$ is 0 for input codes $0,2,8$, and 10 . Other input values cannot occur. Use a Karnaugh map to determine a minimal expression for this function. Design and sketch a circuit to implement this function, using only AND and NOT gates.

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Problem 44

Design the circuit of the function $Y=f(A, B, C)$ described in Figure P11.44.
$$
\begin{array}{ccc|c}
\hline \boldsymbol{A} & \boldsymbol{B} & \boldsymbol{C} & \boldsymbol{Y} \\
\hline 0 & 0 & 0 & 0 \\
0 & 0 & 1 & 0 \\
0 & 1 & 0 & 0 \\
0 & 1 & 1 & 1 \\
1 & 0 & 0 & 0 \\
1 & 0 & 1 & 0 \\
1 & 1 & 0 & 1 \\
1 & 1 & 1 & \mathrm{x} \\
\hline
\end{array}
$$
Figure P11.44

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Problem 45

Design a logic circuit that will produce the ones complement of an 8-bit signed binary number.

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Problem 46

Construct the Karnaugh map for the logic function defined by the truth table of Figure P11.46, and find the minimum expression for the function.
$$
\begin{array}{cccc|c}
\hline \boldsymbol{A} & \boldsymbol{B} & \boldsymbol{C} & \boldsymbol{D} & \boldsymbol{F} \\
\hline 0 & 0 & 0 & 0 & 1 \\
0 & 0 & 0 & 1 & 0 \\
0 & 0 & 1 & 0 & 1 \\
0 & 0 & 1 & 1 & 0 \\
0 & 1 & 0 & 0 & 0 \\
0 & 1 & 0 & 1 & 0 \\
0 & 1 & 1 & 0 & 0 \\
0 & 1 & 1 & 1 & 1 \\
1 & 0 & 0 & 0 & 1 \\
1 & 0 & 0 & 1 & 0 \\
1 & 0 & 1 & 0 & 1 \\
1 & 0 & 1 & 1 & 0 \\
1 & 1 & 0 & 0 & 1 \\
1 & 1 & 0 & 1 & 1 \\
1 & 1 & 1 & 0 & 1 \\
1 & 1 & 1 & 1 & 0 \\
\hline
\end{array}
$$
Figure P11.46

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Problem 47

Use a Karnaugh map to minimize the function $\gamma=(A+\bar{B}) \cdot[(\bar{C} \cdot D)+\bar{A}]$

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Problem 48

Find the minimum output expression for the circuit of Figure P11.48.
Figure can't copy

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Problem 49

Design a combinational logic circuit that will add two 4-bit binary numbers.

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Problem 50

Minimize the expression described in the truth table of Eigure P11.50, and draw the circuit.
$$
\begin{array}{ccc|c}
\hline \boldsymbol{A} & \boldsymbol{B} & \boldsymbol{C} & \boldsymbol{F} \\
\hline 0 & 0 & 0 & 1 \\
0 & 0 & 1 & 1 \\
0 & 1 & 0 & 0 \\
0 & 1 & 1 & 1 \\
1 & 0 & 0 & 1 \\
1 & 0 & 1 & 1 \\
1 & 1 & 0 & 1 \\
1 & 1 & 1 & 0 \\
\hline
\end{array}
$$
Figure P11.50

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Problem 51

Find the minimum expression for the output of the logic circuit of Figure P11.51.
Figure can't copy

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Problem 52

The objective of this problem is to design a combinational logic circuit that will aid in determination of the acceptability of emergency blood transfusions. It is known that human blood can be categorized into four types: $\mathrm{A}, \mathrm{B}, \mathrm{AB}$, and O . Persons with type A blood can donate to both A and AB types and can receive blood from both A and O types. Persons with type B blood can donate to both B and AB types and can receive from both B and O types. Persons with type $A B$ blood can donate only to type $A B$ but can receive from any type. Persons with type O blood can donate to any type but can receive only from type O. Make appropriate variable assignments, and design a circuit that will approve or disapprove any particular transfusion based on these conditions.

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Problem 53

Find the minimum expression for the logic function at the output of the logic circuit of Figure P11.53.
Figure can't copy

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Problem 54

Determine the minimum boolean logic expression associated with the Karnaugh map in Figure P11.54 and create (realize) the logic circuit.
Figure can't copy

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Problem 55

a. Construct a Karnaugh map associated with the truth table of Eigure Pll.55.
b. What is the minimum expression for the function?
c. Draw the logic circuit, using AND, OR, and NOT gates.
$$
\begin{array}{ccc|c}
\hline \boldsymbol{A} & \boldsymbol{B} & \boldsymbol{C} & f(\boldsymbol{A}, \boldsymbol{B}, \boldsymbol{C}) \\
\hline 0 & 0 & 0 & 1 \\
0 & 0 & 1 & 1 \\
0 & 1 & 0 & 0 \\
0 & 1 & 1 & 1 \\
1 & 0 & 0 & 1 \\
1 & 0 & 1 & 1 \\
1 & 1 & 0 & 1 \\
1 & 1 & 1 & 0 \\
\hline
\end{array}
$$
Figure P11.55

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Problem 56

Fill in the Karnaugh map for the logic function defined by the truth table of Figure P11.56. What is the minimum expression for the function?
$$
\begin{array}{cccc|c}
\hline \boldsymbol{A} & \boldsymbol{B} & \boldsymbol{C} & \boldsymbol{D} & \boldsymbol{F} \\
\hline 0 & 0 & 0 & 0 & 1 \\
0 & 0 & 0 & 1 & 0 \\
0 & 0 & 1 & 0 & 1 \\
0 & 0 & 1 & 1 & 0 \\
0 & 1 & 0 & 0 & 0 \\
0 & 1 & 0 & 1 & 0 \\
0 & 1 & 1 & 0 & 0 \\
0 & 1 & 1 & 1 & 1 \\
1 & 0 & 0 & 0 & 1 \\
1 & 0 & 0 & 1 & 0 \\
1 & 0 & 1 & 0 & 1 \\
1 & 0 & 1 & 1 & 0 \\
1 & 1 & 0 & 0 & 1 \\
1 & 1 & 0 & 1 & 1 \\
1 & 1 & 1 & 0 & 1 \\
1 & 1 & 1 & 1 & 0 \\
\hline
\end{array}
$$
Figure P11.56

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Problem 57

Fill in the Karnaugh map for the logic function defined by the truth table of Figure P11.57. What is the minimum expression for the function? Realize the function using only NAND gates.
$$
\begin{array}{cccc|c}
\hline \boldsymbol{A} & \boldsymbol{B} & \boldsymbol{C} & \boldsymbol{D} & \boldsymbol{F} \\
\hline 0 & 0 & 0 & 0 & 1 \\
0 & 0 & 0 & 1 & 1 \\
0 & 0 & 1 & 0 & 1 \\
0 & 0 & 1 & 1 & 1 \\
0 & 1 & 0 & 0 & 0 \\
0 & 1 & 0 & 1 & 1 \\
0 & 1 & 1 & 0 & 0 \\
0 & 1 & 1 & 1 & 1 \\
1 & 0 & 0 & 0 & 1 \\
1 & 0 & 0 & 1 & 1 \\
1 & 0 & 1 & 0 & 0 \\
1 & 0 & 1 & 1 & 0 \\
1 & 1 & 0 & 0 & 0 \\
1 & 1 & 0 & 1 & 1 \\
1 & 1 & 1 & 0 & 1 \\
1 & 1 & 1 & 1 & 0 \\
\hline
\end{array}
$$
Figure P11.57

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Problem 58

Design a circuit with a 4 -bit input representing the binary number $A_3 A_2 A_1 A_0$. The output should be 1 if the input value is divisible by 3 . Assume that the circuit is to be used only for the digits 0 through 9 (thus, values for 10 to 15 can be don't-care conditions).
a. Draw the Karnaugh map and truth table for the function.
b. Determine the minimum expression for the function.
c. Draw the circuit, using only AND, OR, and NOT gates.

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Problem 59

Find the simplest SOP representation of the function associated with the Karnaugh map shown in Figure P11.59.
Figure can't copy

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Problem 60

Can the circuit for Problem 11.54 be simplified if it is known that the input represents a BCD (binary-coded decimal) number, that is, if it can never be greater than $9_{10}$ ? If not, explain why not. Otherwise, design the simplified circuit.

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Problem 61

Find the simplest SOP representation of the function associated with the Karnaugh map shown in Figure P11.61.
Figure can't copy

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Problem 62

One method of ensuring reliability in data transmission systems is to transmit a parity bit along with every nibble, byte, or word of binary data transmitted. The parity bit confirms whether an even or odd number of 1 s were transmitted in the data. In even-parity systems, the parity bit is set to 1 when the number of 1s in the transmitted data is odd. Odd-parity systems set the parity bit to 1 when the number of 1 s in the transmitted data is even. Assume that a parity bit is transmitted for every nibble of data. Design a logic circuit that checks the nibble of data and transmits the proper parity bit for both even- and odd-parity systems.

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Problem 63

Assume that a parity bit is transmitted for every nibble of data. Design two logic circuits that check a nibble of data and its parity bit to determine if there may have been a data transmission error. Assume first an even-parity system, then an odd-parity system.

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Problem 64

Design a logic circuit that takes a 4-bit Gray code input from an optical encoder and translates it into two 4-bit nibbles of BCD.

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Problem 65

Design a logic circuit that takes a 4-bit Gray code input from an optical encoder and determines if the input value is a multiple of 3 .

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Problem 66

The 4221 code is a base 10 -oriented code that assigns the weights 4221 to each of 4 bits in a nibble of data. Design a logic circuit that takes a BCD nibble as input and converts it to its 4221 equivalent. The logic circuit should also report an error in the BCD input if its value exceeds 1001.

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Problem 67

The 4-bit digital output of each of two sensors along an assembly line conveyor belt is proportional to the number of parts that pass by on the conveyor belt in a 30-s period. Design a logic circuit that reports an error if the outputs of the two sensors differ by more than one part per 30-s period.

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Problem 68

A function $F$ is defined such that it equals 1 when a 4-bit input code is equivalent to any of the decimal numbers $3,6,9,12$, or $15 . F$ is 0 for input codes $0,2,8$, and 10 . Other input values cannot occur. Use a Karnaugh map to determine a minimal expression for this function. Design and sketch a circuit to implement this function using only AND and NOT gates.

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Problem 69

Fill in the Karnaugh map for the logic function defined by the truth table of Figure P11.69. What is the minimum expression for the function? Realize the function using a 1 -of- 8 multiplexer.
$$
\begin{array}{cccc|c}
\hline \boldsymbol{A} & \boldsymbol{B} & \boldsymbol{C} & \boldsymbol{D} & \boldsymbol{f}(\boldsymbol{A}, \boldsymbol{B}, \boldsymbol{C}, \boldsymbol{D}) \\
\hline 0 & 0 & 0 & 0 & 1 \\
0 & 0 & 0 & 1 & 0 \\
0 & 0 & 1 & 0 & 1 \\
0 & 0 & 1 & 1 & 1 \\
0 & 1 & 0 & 0 & 0 \\
0 & 1 & 0 & 1 & 1 \\
0 & 1 & 1 & 0 & 0 \\
0 & 1 & 1 & 1 & 0 \\
1 & 0 & 0 & 0 & 0 \\
1 & 0 & 0 & 1 & 1 \\
1 & 0 & 1 & 0 & 0 \\
1 & 0 & 1 & 1 & 0 \\
1 & 1 & 0 & 0 & 1 \\
1 & 1 & 0 & 1 & 0 \\
1 & 1 & 1 & 0 & 1 \\
1 & 1 & 1 & 1 & 1 \\
\hline
\end{array}
$$
Figure P11.69

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Problem 70

Fill in the truth table for the multiplexer circuit shown in Figure P11.70. What binary function is performed by these multiplexers?
Figure can't copy

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01:59

Problem 71

The circuit of Eigure P11.71 operates as a 4:16 decoder. Terminal EN denotes the enable input. Describe its operation. What is the role of logic variable $A$ ?
Figure can't copy

Roee Shalom
Roee Shalom
Numerade Educator

Problem 72

Show that the circuit given in Figure P11.72 converts 4-bit binary numbers to 4-bit Gray code.
Figure can't copy

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Problem 73

Suppose one of your classmates claims that the following boolean expressions represent the conversion from 4-bit Gray code to 4-bit binary numbers:

$$
\begin{aligned}
& B_3=G_3 \\
& B_2=G_3 \oplus G_2 \\
& B_1=G_3 \oplus G_2 \oplus G_1 \\
& B_0=G_3 \oplus G_2 \oplus G_1 \oplus G_0
\end{aligned}
$$

a. Show that your classmate's claim is correct.
b. Draw the circuit that implements the conversion.

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01:03

Problem 74

Select the proper inputs for a four-input multiplexer to implement the function $f(A, B, C)=\bar{A} B \bar{C}+A \overline{B C}+A C$. Assume inputs $I_0, I_1, I_2$, and $I_3$ correspond to $\overline{A B}, \bar{A} B, A \bar{B}$, and $A B$, respectively, and that each input may be $0,1, \bar{C}$, or $C$.

James Kiss
James Kiss
Numerade Educator

Problem 75

Select the proper inputs for an 8-bit multiplexer to implement the function $f(A, B, C, D)=\sum(2,5,6,8,9,10,11,13,14)_{10}$. Assume the inputs $I_0$ through $I_7$ correspond to $\overline{A B C}, A \overline{B C}, \bar{A} B \bar{C}, A B \bar{C}, \overline{A B} C, A \bar{B} C, \bar{A} B C$, and $A B C$, respectively, and that each input may be $0,1, \bar{D}$, or $D$.

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Problem 76

Use a $3: 8$ decoder and a three-input OR gate to implement the logic function $f(x, y, z)=x y+x y+x y z$. Draw a logic diagram and create the associated truth table.

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