Solid State Electronic Devices

Ben G. Streetman, Sanjay Kumar Banerjee

Chapter 6

Field-Effect Transistors - all with Video Answers

Educators

Chapter Questions

Problem 1

Assume the JFET shown in Fig. $6-6$ is $\mathrm{Si}$ and has $\mathrm{p}^{+}$ regions doped with $10^{18}$ acceptors/cm $^{3}$ and a channel with $10^{16}$ donors $/ \mathrm{cm}^{3} .$ If the channel halfwidth $a$ is $1 \mu \mathrm{m}$, compare $V_{P}$ with $V_{0}$. What voltage $V_{G D}$ is required to cause pinch-off when $V_{0}$ is included? With $V_{G}=-3 \mathrm{~V}$, at what value of $V_{D}$ does the current saturate?

Chai Santi

Chai Santi

Numerade Educator

Problem 2

If the ratio $Z / L=10$ for the JFET of Prob. $6.1$, and $\mu_{n}=1000 \mathrm{~cm}^{2} / \mathrm{V}$ -s, $\mathrm{cal}$ culate $I_{D}$ (sat.) for $V_{G}=0,-2,-4$, and $-6 \mathrm{~V}$. Plot $I_{D}$ (sat.) vs. $V_{D}$ (sat.).

Chai Santi

Numerade Educator

Problem 3

For the JFET of Prob. $6.2$, plot $I_{D}$ vs. $V_{D}$ for the same four values of $V_{G}$ Terminate each plot at the point of saturation.

Chai Santi

Numerade Educator

Problem 4

Use Eqs. $(6-9)$ and $(6-10)$ to calculate and plot $I_{D}\left(V_{D}, V_{G}\right)$ at $300 \mathrm{~K}$ for a $\mathrm{Si}$ JFET with $a=1000 \mathrm{~A}, N_{d}=7 \times 10^{17} \mathrm{~cm}^{-3}, Z=100 \mu \mathrm{m}$, and $L=5 \mu \mathrm{m}$.
Allow $V_{D}$ to range from 0 to $5 \mathrm{~V}$, and allow $V_{G}$ to take on the values 0 , $-1,-2,-3,-4$, and $-5 \mathrm{~V}$

Chai Santi

Numerade Educator

Problem 5

Use the field-dependent mobility expression to calculate and plot $I_{D}\left(V_{D}, V_{G}\right)$ for the Si JFET described in Prob. $6.4$ for gate lengths of $0.25,0.50,1.0,2.0$, and $5.0 \mu \mathrm{m}$ and a gate voltage of $0 \mathrm{~V}$. The field-dependent mobility model of Eq. $(8-12)$ takes the form

Manik Pulyani

Numerade Educator

Problem 6

Consider a n-channel JFET. Draw the transfer characteristics curve. Show that the drain current is independent of drain voltage after pinch off. If the donor concentration increases in the substrate, then how will it affect the drain current?

Chai Santi

Numerade Educator

Problem 7

Show that the width of the depletion region in Fig. $6-15$ is given by Eq. $(6-30)$. Assume the carriers are completely swept out within $W$, as was done in Section 5.2.3.

Linda Hand

Numerade Educator

Problem 8

Sketch the low and high-frequency behavior (and explain the difference) of an MOS capacitor with a high-k gate dielectric $\left(\epsilon_{r}=25\right)$ on an $\mathrm{n}$ -type semiconductor $\left(\epsilon_{r}=10, \mathrm{n}_{1}=10^{13} \mathrm{~cm}^{-3}\right)$. Mark off the accumulation, depletion, inversion regions, and the approximate location of the flat band and threshold voltages. If the high-frequency capacitance is $250 \mathrm{nF} / \mathrm{cm}^{2}$ in accumulation and $50 \mathrm{nF} / \mathrm{cm}^{2}$ in inversion, calculate the dielectric thickness and the depletion width in inversion.

Chai Santi

Numerade Educator

Problem 9

Sketch the low and high-frequency $C-V$ behavior (and explain any difference) of an MOS capacitor with a high-k gate dielectric $\left(\epsilon_{r}=25\right)$ on a p-type Si substrate doped at $10^{17} \mathrm{~cm}^{-3}$. Label the accumulation, depletion, inversion regions. If the high-frequency capacitance is $2 \mu \mathrm{F} / \mathrm{cm}^{2}$ in accumulation, calculate the dielectric thickness and the minimum high-frequency capacitance.

Chai Santi

Numerade Educator

Problem 10

A CMOS capacitor with $\mathrm{n}^{+}$ Poly Si as metal gate has $100 \mathrm{~nm}$ thick oxide $\left(\mathrm{SiO}_{2}\right)$ layer, $1.5 \times 10^{16} / \mathrm{cm}^{3}$ substrate carrier density, $8 \times 10^{-8} \mathrm{C} / \mathrm{cm}^{2}$ oxide layer charge density, and $-6 \times 10^{-8} \mathrm{C} / \mathrm{cm}^{2}$ depletion layer charge density. Find
(a) the oxide capacitance,
(b) the maximum depletion width,
(c) the modified work function.
$\left[\right.$ Given: $\left.\epsilon_{r}\left(\mathrm{SiO}_{2}\right)=3.9, \epsilon_{0}=8.854^{*} 10^{-14} \mathrm{~F} / \mathrm{cm}\right]$

Chai Santi

Numerade Educator

Problem 11

An Al-gate p-channel MOS transistor is made on an $\mathrm{n}$ -type $\mathrm{Si}$ substrate with $N_{d}=5 \times 10^{17} \mathrm{~cm}^{-3}$. The $\mathrm{SiO}_{2}$ thickness is $100 \mathrm{~A}$ in the gate region, $\phi_{m s}=-0.15 \mathrm{~V}$, and the effective interface charge $\mathrm{Q}_{i}$ is $5 \times 10^{10} q \mathrm{C} / \mathrm{cm}^{2}$. Find $W_{m}, V_{F B}$, and $V_{T}$. Sketch the $C-V$ curve for this device and give important numbers for the scale.

Chai Santi

Numerade Educator

Problem 12

Use Eq. $(6-50)$ to calculate and plot $I_{D}\left(V_{D}, V_{G}\right)$ at $300 \mathrm{~K}$ for an n-channel Si MOSFET with an oxide thickness $d=200 \dot{\mathrm{A}}$, a channel mobility $\bar{\mu}_{n}=1000 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}, Z=100 \mu \mathrm{m}, L=5 \mu \mathrm{m}$, and $N_{a}$ of $10^{14}, 10^{15}, 10^{16}$, and
$10^{17} \mathrm{~cm}^{-3}$. Allow $V_{D}$ to range from 0 to $5 \mathrm{~V}$ and allow $V_{G}$ to take on values of $0,1,2,3,4$, and $5 \mathrm{~V}$. Assume that $\mathrm{Q}_{i}=5 \times 10^{11} \mathrm{q} \mathrm{Clcm}^{2}$

Chai Santi

Numerade Educator

Problem 13

In Prob. $6.2$, find the threshold voltage $V_{T}$ for the MOS structure. How much $\mathrm{AL}$ has to be doped in the substrate in order to achieve $20 \%$ reduction in the present threshold voltage of the structure?

Chai Santi

Numerade Educator

Problem 14

A MOS capacitor is made with $\mathrm{n}^{+}$ Poly Si gate. Si substrate carrier density is $2 \times 10^{16} / \mathrm{cm}^{3}$, and the oxide region thickness is $80 \mathrm{~nm}$. Find the flat band voltage $\left(V_{F B}\right)$ of the structure, where the oxide charge density is $2 \times 10^{9} \mathrm{C} / \mathrm{cm}^{2}$ and $\phi_{\mathrm{ms}}=-0.90 \mathrm{~V}$

Chai Santi

Numerade Educator

Problem 15

$$
\text { Redraw Figs. } 6-12,6-13, \text { and } 6-15 \text { for the p-channel case (n-type substrate). }
$$

AG

Ankit Gupta

Numerade Educator

Problem 16

Calculate the $V_{T}$ of an MOS capacitor where we deposit a high-k gate dielectric, $\mathrm{HfO}_{2}$, whose relative dielectric constant is 25, on a novel $\mathrm{p}$ -type semiconductor whose electron affinity is $4 \mathrm{eV}$, band gap is $1.5 \mathrm{eV}$, relative dielectric constant is 10 , and intrinsic carrier concentration is $10^{12} \mathrm{~cm}^{-3}$. The gate is made of a metal whose work function is $5 \mathrm{eV}$, gate oxide thickness is $100 \mathrm{~A}$, and $N_{A}$ is $10^{\mathrm{ts}} \mathrm{cm}^{-3}$ and that has a fixed oxide charge of $5 \times 10^{10} q \mathrm{Clcm}^{2}$. At $V_{T}$, what are the electron and hole concentrations at the oxide-semiconductor interface and deep in the substrate? Sketch a labeled band diagram normal to the surface at $V_{T}$, and mark off the relevant values on the basis of the numbers given.

Sketch the low- and high-frequency $C-V$ characteristics of this capacitor, and explain their differences. How would the characteristics change at large negative gate bias if we doubled the oxide thickness? How about if we doubled the substrate doping?

Chai Santi

Numerade Educator

Problem 17

A Si MOS capacitor has the high-frequency $C-V$ curve shown in Fig. $\mathrm{P} 6-17$ normalized to the capacitance in strong accumulation. Determine the oxide
thickness and substrate doping assuming a gate-to-substrate work function difference of $-0.35 \mathrm{~V}$.

Chai Santi

Numerade Educator

Problem 18

For the capacitor in Prob. $6.17$, determine the initial flat band voltage.

Amit Srivastava

Amit Srivastava

Numerade Educator

Problem 19

For the capacitor in Prob. $6.17$, determine the fixed oxide charge, $Q_{i}$, and the mobile ion content.

Sheh Lit Chang

University of Washington

Problem 20

Sketch the cross section of a n-channel enhancement-mode Si MOSFET. It has a channel length of $2 \mu \mathrm{m}$, width of $5 \mu \mathrm{m}$, high-k gate dielectric of thickness $10 \mathrm{~nm}$, with a relative dielectric constant of 25, and substrate doping of $10^{18} \mathrm{~cm}^{-3} .$ If the threshold voltage is $0.5 \mathrm{~V}$, calculate the flat band voltage. For a gate bias of $3 \mathrm{~V}$, what is the total approximate inversion charge under the channel? Sketch the band diagram as a function of depth in the middle of the channel under this condition, specifying the value of the band edges to the Fermi level deep in the bulk and at the interface with the gate dielectric.
For a drain bias of $0.1 \mathrm{~V}$, calculate the drain current. The mobility of electrons is $1000 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}$ and the effective mobility of holes is $200 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}$. Repeat the calculation of drain current using a "charge control" approach by dividing the inversion charge by the transit time for carriers to go from source to drain.

Chai Santi

Numerade Educator

Problem 21

Calculate $V_{T}$ of a Si n-channel MOSFET with $\phi_{\mathrm{ms}}=-0.25 \mathrm{~V}, 100 \mathrm{~nm}$ gate oxide thickness, $N_{A}=10^{17} / \mathrm{cm}^{3}$, and oxide charge density $5 \times 10^{18} \mathrm{Clcm}^{2}$ for a substrate bias of $-2 \mathrm{~V} .\left(Q D=6 \times 10^{-8} \mathrm{C} / \mathrm{cm}^{2}\right)$ If the channel mobility is $\mu_{\mathrm{n}}=$ $250 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{sec}$, then what will be the drive current for a $50-\mathrm{nm}$ channel MOSFET with gate bias at $2 \mathrm{~V}$ working at saturation region? The length of the MOSFET is $2 \mu \mathrm{m}$.

Chai Santi

Numerade Educator

Problem 22

A M-SiO $_{2}$ -SI MOSFET turns on with $0.7 \mathrm{~V}$ gate voltage, and the capacitance generates $1 \mu \mathrm{F} / \mathrm{cm}^{2}$. Calculate the overdrive voltage for $V_{G}=V_{D}=3 \mathrm{~V}$ when the channel length is $70 \mathrm{~nm}$. Suppose in this structure the Fermi level is $0.365 \mathrm{eV}$ below the intrinsic level in the substrate, and the substrate is doped with $2 \times 10^{16} / \mathrm{cm}^{3}$ acceptor doping. Now, calculate the drain saturation current if the effective channel mobility is $550 \mathrm{~cm}^{2} / \mathrm{V}$ -sec and carrier saturation velocity is $0.5 \times 10^{7} \mathrm{~cm} / \mathrm{sec}$

Chai Santi

Numerade Educator

Problem 23

A p-channel enhancement-mode MOSFET with $50 \mathrm{~nm}$ thick $\mathrm{HfO}_{2}$ high-k gate dielectric $\left(\epsilon_{r}=25\right)$ has a threshold voltage of $-0.6 \mathrm{~V}$. The effective hole channel mobility is $150 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}$. What is the drive current for a $50 \mu \mathrm{m}$ wide and $2 \mu \mathrm{m}$ long device at $V_{G}=-3 \mathrm{~V}$ and $V_{D}=-0.05 \mathrm{~V} ?$ What is the saturation current at this gate bias? Sketch a cross section of the device schematically showing the inversion layer if gate and drain are both at $-3 \mathrm{~V}$. Below that sketch qualitatively the variation of channel potential with position.

Chai Santi

Numerade Educator

Problem 24

For a long channel nMOSFET with $V_{T}=1 \mathrm{~V}$, calculate the $V_{G}$ required for an $I_{D}$ (sat.) of $0.1 \mathrm{~mA}$ and $V_{D}$ (sat.) of $5 \mathrm{~V}$. Calculate the small-signal output conductance $g$ and the transconductance $g_{m}$ (sat.) at $V_{D}=10 \mathrm{~V}$. Sketch the cross section of this MOSFET, and schematically show the inversion charge and depletion charge distributions for $V_{D}=1 \mathrm{~V}, 5 \mathrm{~V}$, and $10 \mathrm{~V}$. Recalculate the new $I_{D}$ for $V_{G}-V_{T}=3 \mathrm{~V}$ and $V_{D}=4 \mathrm{~V}$.

Chai Santi

Numerade Educator

Problem 25

Calculate the $V_{T}$ of a Sin-channel MOSFET for a gate-to-substrate work function difference $\phi_{m \mathrm{~s}}=-1.5 \mathrm{eV}$, gate oxide thickness $=100 \mathrm{~A}, N_{A}=10^{18} \mathrm{~cm}^{-3}$,
and fixed oxide charge of $5 \times 10^{10} q \mathrm{C} / \mathrm{cm}^{2}$, for a substrate bias of $-2.5 \mathrm{~V} .$ At $V_{T}$, what are the electron and hole concentrations at the oxide-Si interface and deep in the substrate? Sketch a labeled band diagram normal to the surface at $V_{T}$, showing the Fermi potential.

Chai Santi

Numerade Educator

Problem 26

Calculate the $V_{T}$ of a Si n-channel MOSFET for an $\mathrm{n}^{+}$ -polysilicon gate with gate oxide thickness $=100 \mathrm{~A}, N_{a}=10^{18} \mathrm{~cm}^{-3}$, and a fixed oxide charge of $5 \times 10^{10} q \mathrm{C} / \mathrm{cm}^{2}$

Chai Santi

Numerade Educator

Problem 27

For a n-channel MOSFET with gate oxide thickness of $30 \mathrm{~nm}$, threshold voltage of $0.7 \mathrm{~V}, Z=30 \mu \mathrm{m}$, and length of the device is $0.9 \mu \mathrm{m}$, calculate the drain current for $V_{G}=3 \mathrm{~V}$ and $V_{D}=0.2 \mathrm{~V}$.Assume that the electron channel mobility is $200 \mathrm{~cm}^{2} / \mathrm{V}$ -sec, what will be the required drain current to drive the MOS in saturation region?

Chai Santi

Numerade Educator

Problem 28

For the MOSFET characteristics shown in Fig. P6-28, calculate:
1. Linear $V_{T}$ and $\mathrm{k}_{N}$
2. Saturation $V_{T}$ and $\mathrm{k}_{N}$
Assume channel mobility $\bar{\mu}_{n}=500 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}$ and $V_{F B}=0 .$

Chai Santi

Numerade Educator

Problem 29

For Prob. $6.28$, calculate the gate oxide thickness and substrate doping, either graphically or iteratively.

Chai Santi

Numerade Educator

Problem 30

For a n-channel MOSFET with gate oxide thickness of $20 \mathrm{~nm}$, calculate the required phosphorous ( $\mathrm{P}$ ions $/ \mathrm{cm}^{2}$ ) to be doped to reduce the threshold voltage from $1.5 \mathrm{~V}$ to $1 \mathrm{~V}$. If the $\mathrm{P}$ ion implantation takes place for 15 seconds with a beam current of amount $10^{-6}$ Amp, then what scan area will be covered by the implanted beam?

Chai Santi

Numerade Educator

Problem 31

In Prob. 6.5, calculate the depletion charge $\left(Q_{D}\right)$ and the threshold voltage $\left(V_{T}\right)$. Now suppose a reverse bias of $0.4 \mathrm{~V}$ is applied between the substrate and the source, how will it affect the $V_{T}$ due to evolved substrate bias effect?

Chai Santi

Numerade Educator

Problem 32

Plot $I_{D}$ vs. $V_{D}$ with several values of $V_{G}$ for a thin-oxide p-channel transistor with a $10-\mu \mathrm{m}$ oxide and $V_{T}=-1.1 \mathrm{~V}$. Assume that $I_{D}$ (sat.) remains constant beyond pinch-off. Assume that $\bar{\mu}_{p}=200 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}$, and $Z=10 L$.

Prachita Kush

Numerade Educator

Problem 33

A typical figure of merit for high-frequency operation of MOS transistors is the cutoff frequency $f_{c}=g_{m} / 2 \pi \mathrm{C}_{G} L Z$, where the gate capacitance $\mathrm{C}_{G}$ is essentially $C_{i}$ over most of the voltage range. Express $f_{c}$ above pinch-off in terms of materials parameters and device dimensions, and calculate $f_{c}$ for the transistor of Prob. $6.32$, with $L=1 \mu \mathrm{m}$.

Chai Santi

Numerade Educator

Problem 34

When an MOS transistor is biased with $V_{D}>V_{D}$ (sat.), the effective channel length is reduced by $\Delta L$ and the current $I_{D}^{\prime}$ is larger than $I_{D}$ (sat.), as shown in Fig.6-32. Assuming that the depleted region $\Delta L$ is described by an expression similar to Eq. $(6-30)$ with $V_{D}-V_{D}($ sat. $)$ for the voltage across $\Delta L$, show that the conductance beyond saturation is
$$
g_{D}^{\prime}=\frac{\partial I_{D}^{\prime}}{\partial V_{D}}=I_{D} \text { (sat.) } \frac{\partial}{\partial V_{D}}\left(\frac{L}{L-\Delta L}\right)
$$
and find the expression for $g_{D}^{\prime}$ in terms of $V_{D}$.

Chai Santi

Numerade Educator

Problem 35

From Fig. $6-44$, it is clear that the depletion regions of the source and drain junctions can meet for short channels, a condition called punch-through. Assume that the source and drain regions of an $\mathrm{n}$ -channel Si MOSFET are doped with $10^{20}$ donors $/ \mathrm{cm}^{3}$ and the $1-\mu \mathrm{m}$ -long channel is doped with $10^{16}$ acceptors $/ \mathrm{cm}^{3} .$ If the source and substrate are grounded, what drain voltage will cause punch-through?

Chai Santi

Numerade Educator