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Operating System Concepts Essentials

Abraham Silberschatz, Peter B. Galvin, Greg Gagne

Chapter 12

I/O Systems - all with Video Answers

Educators

Chapter Questions

Problem 1

State three advantages of placing functionality in a device controller, rather than in the kernel. State three disadvantages.

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01:21

Problem 2

The example of handshaking in Section 13.2 used two bits: a busy bit and a command-ready bit. Is it possible to implement this handshaking with only one bit? If it is, describe the protocol. If it is not, explain why one bit is insufficient.

Clarissa Noh
Clarissa Noh
Numerade Educator
01:29

Problem 3

Why might a system use interrupt-driven $\mathrm{I} / \mathrm{O}$ to manage a single serial port and polling $\mathrm{I} / \mathrm{O}$ to manage a front-end processor, such as a terminal concentrator?

Adam Conner
Adam Conner
Numerade Educator
01:19

Problem 4

Polling for an I/O completion can waste a large number of CPU cycles if the processor iterates a busy-waiting loop many times before the I/O completes. But if the I/O device is ready for service, polling can be much more efficient than is catching and dispatching an interrupt. Describe a hybrid strategy that combines polling, sleeping, and interrupts for I/O device service. For each of these three strategies (pure polling, pure interrupts, hybrid), describe a computing environment in which that strategy is more efficient than is either of the others.

Adam Conner
Adam Conner
Numerade Educator

Problem 5

How does DMA increase system concurrency? How does it complicate hardware design?

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Problem 6

Why is it important to scale up system-bus and device speeds as CPU speed increases?

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Problem 7

Distinguish between a STREAMS driver and a STREAMS module.

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Problem 8

When multiple interrupts from different devices appear at about the same time, a priority scheme could be used to determine the order in which the interrupts would be serviced. Discuss what issues need to be considered in assigning priorities to different interrupts.

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Problem 9

What are the advantages and disadvantages of supporting memorymapped I/O to device control registers?

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00:48

Problem 10

Consider the following I/O scenarios on a single-user PC:
a. A mouse used with a graphical user interface
b. A tape drive on a multitasking operating system (with no device preallocation available)
c. A disk drive containing user files
d. A graphics card with direct bus connection, accessible through memory-mapped I/O
For each of these scenarios, would you design the operating system to use buffering, spooling, caching, or a combination? Would you use polled $\mathrm{I} / \mathrm{O}$ or interrupt-driven $\mathrm{I} / \mathrm{O}$ ? Give reasons for your choices.

James Kiss
James Kiss
Numerade Educator
02:33

Problem 11

In most multiprogrammed systems, user programs access memory through virtual addresses, while the operating system uses raw physical addresses to access memory. What are the implications of this design for the initiation of I/O operations by the user program and their execution by the operating system?

Shelby Mohamed
Shelby Mohamed
Numerade Educator
02:21

Problem 12

What are the various kinds of performance overhead associated with servicing an interrupt?

Sanchit Jain
Sanchit Jain
Numerade Educator

Problem 13

Describe three circumstances under which blocking I/O should be used. Describe three circumstances under which nonblocking I/O should be used. Why not just implement nonblocking I/O and have processes busy-wait until their devices are ready?

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Problem 14

Typically, at the completion of a device $\mathrm{I} / \mathrm{O}$, a single interrupt is raised and appropriately handled by the host processor. In certain settings, however, the code that is to be executed at the completion of the I/O can be broken into two separate pieces. The first piece executes immediately after the I/O completes and schedules a second interrupt for the remaining piece of code to be executed at a later time. What is the purpose of using this strategy in the design of interrupt handlers?

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Problem 15

Some DMA controllers support direct virtual memory access, where the targets of I/O operations are specified as virtual addresses and a translation from virtual to physical address is performed during the DMA. How does this design complicate the design of the DMA controller? What are the advantages of providing such functionality?

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00:59

Problem 16

UNIX coordinates the activities of the kernel I/O components by manipulating shared in-kernel data structures, whereas Windows NT uses object-oriented message passing between kernel I/O components. Discuss three pros and three cons of each approach.

James Kiss
James Kiss
Numerade Educator

Problem 17

Write (in pseudocode) an implementation of virtual clocks, including the queueing and management of timer requests for the kernel and applications. Assume that the hardware provides three timer channels.

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Problem 18

Discuss the advantages and disadvantages of guaranteeing reliable transfer of data between modules in the STREAMS abstraction.

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