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Principles of Computer Hardware

Alan Clements

Chapter 9

Processor architectures - all with Video Answers

Educators

Chapter Questions

Problem 1

What are the advantages and disadvantages of microprocessor word lengths that are not powers of 2 (e.g. 12 bits and 24 bits)?

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Problem 2

We said that all processors permit register-to-memory. memory-to-register, and register-to-register moves, whereas few microprocessors permit direct memory-tomemory moves. What are the advantages and disadvantages of direct memory-to-memory moves?

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01:43

Problem 3

Some computers have a wide range of shift operations (e.g. logical, arithmetic, and rotate). Some computers have very few shift operations. Suppose that your computer had only a single logical shift left operation. How would you synthesize all the other shifts using this instruction and other appropriate operations on the data?

Shelby Mohamed
Shelby Mohamed
Numerade Educator

Problem 4

Some microprocessors implement simple unconditional procedure (i.e. subroutine) calls with a BSR (branch to subroutine) instruction. Other microprocessors have a conditional branch to subroutine instruction that let's you call a subroutine conditionally. What are the relative merits and disadvantages of these two approaches to instruction design?

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Problem 5

Some registers in a microprocessor are part of its architecture which is visible to the programmer, whereas other registers belong to the processor's organization and are invisible to the programmer. Explain what this statement means.

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Problem 6

The MC68HC12 instruction set of Table 9.2 has a very large number of instructions. Design a new instruction set that performs the same operations but uses fewer instruction types (e.g. employ a MOVE instruction to replace many of the 6809 's existing data transfer instructions).

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03:09

Problem 7

What are the relative advantages and disadvantages of variable-length instructions (in contrast with fixed-length instructions).

Jeremiah Mbaria
Jeremiah Mbaria
Numerade Educator
00:16

Problem 8

9.8 In what significant ways does the ARM differ from the $68 \mathrm{~K}$ ?

Sam Limsuwannarot
Sam Limsuwannarot
Numerade Educator

Problem 9

Most RISC processors have 32 user-accessible registers, whereas the ARM has only 16 . Why is this so?

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Problem 10

Construct an instruction set that has the best features of a CISC processor like the $68 \mathrm{~K}$ and a RISC processor like the ARM. Write some test programs for your architecture and compare them with the corresponding pure $68 \mathrm{~K}$ and ARM programs.

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Problem 11

All ARM instructions are conditional, which means that they are executed only if a defined condition is met; for example, ADDEQ means 'add if the last result set the zero flag'.
Explain how this feature can be exploited to produce very compact code. Give examples of the use of this feature to implement complex conditional constructs.

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Problem 12

9.12 What is the effect of the following ARM instructions?
(a) MOV r1, \#OXFF
(b) MVN r1, \#0xFF
(c) MVN r1, \#25
(d) MVN r1, $\# 0 \times \mathrm{F}$
(e) MOVS r1, \#0XF
(f) MLA r3, r5, r6, r2
(g) $L D R \quad r 1,[r 3, \# 8]$ !
(h) LDR $\mathbf{r 1},[r 3, \# 8]$

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Problem 13

The ARM has a wealth of move multiple register instructions, which copy data between memory and several registers. The load versions of these instructions are
LDMIB, LDMDA, LDMDB, LDMFD, LDMEA, LDMED, LDMEA
What do these instructions do? You will need to look up ARM literature to answer this question.

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01:10

Problem 14

How are subroutines handled in ARM processors?

Adam Conner
Adam Conner
Numerade Educator

Problem 15

Implement a jump table in ARM assembly language. A jump table is used to branch to one of a series of addresses stored in a table. For example, if register $r 3$ contains the value $i$, a jump (i.e. branch) will be made to the address of the ith entry in the table. Jump tables can be used to implement the case or switch construct in high-level languages.

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01:07

Problem 16

Consider the fragment of $C$-code if ( $p==0$ ) $q=q 11 ;$ else $q=q^{\star} 4$;
How can conditional execution be exploited by the compiler for this code?

Mohamed Mohamed
Mohamed Mohamed
Numerade Educator

Problem 17

A 32-bit IEEE floating point number is packed and contains a sign bit, biased exponent, and fractional mantissa. Write an ARM program that takes a 32-bit IEE floating point number and returns a sign-bit (most significant bit of r1), a true exponent in $r 3$, and a mantissa with a leading 1 in register $r 3$.
Write a program to convert an unsigned 8-digit decimal integer into a 32-bit IEEE floating point number. The 8-digit decimal integer is stored at the memory location pointed at by $r 1$ and the result is to be returned in $r$. The decimal number is right justified and leading digits are filled with zeros; for example, 1234 would be stored at 00001234 .

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