Looking for a way to activate the new data path you designed in problem 12.17 in parallel with the execution of another nanoinstruction, you spy an N.C. (not connected) control-ROM output bit. Show how, with only a single added gate, this ROM output bit could be used to activate the new data path (that is, load the OP register and clear the phase counter). Your change should be compatible with the original nanocode; in other words, the assertion of $\overline{\mathrm{LDOP}}$ should still cause the OP register to load and the phase counter to clear. (Note that the original nanocode always drives the N.C. pin high.)