Suppose that one of the following control signals in the single-cycle RISC-V processor has a stuck-at-0 fault, meaning that the signal is always 0 regardless of its intended value. What instructions would malfunction? Why? Use the extended version of the single-cycle processor shown in Figures 7.15 and 7.16.
(a) RegWrite
(b) $A L U O p_1$
(c) $A L U O p_0$
(d) Mem Write
(e) $\mathrm{ImmSrc}_1$
(f) $\mathrm{ImmSr}_0$
(g) ResultSr $c_1$
(h) ResultSr $c_0$
(i) $\mathrm{PCSrC}$
(j) ALUSrc