Will the DRAM refresh timing specifications be met if the refr instructions are removed from the microprogram shown in figure 12.22? (Assume that the MAYBE clock frequency is $1 \mathrm{MHz}$ and that each DRAM row must be accessed once every $2 \mathrm{~ms}$ in order to guarantee that no data are lost.) If the DRAM refresh timing specifications will not be met, is there a way to revise the program so that no refr instructions are necessary? Explain.