Mission 2-008
General: The goal of this Mission is to practice using simple phrases in Verilog. You should watch the videos and then apply your knowledge by designing the circuits listed using Verilog or by identifying errors in the given Verilog example code. You should test your Verilog code using the testbenches provided, submit .out files in response to coding problems, and numerical responses when asked for line numbers. See the video item "Submitting Verilog Programming Assignments" to learn more about how to do submissions. These 4 problems will be auto-graded upon submission of the answers.
Problem 2: Correct the Code. This assignment is required. Students must earn at least 70% of the points possible to pass the assignment.
Correct the Verilog code given in the previous problem. To begin, download the starter file AAC2M3P3.v, the testbench file AAC2M3P3_tb.vp, and vector.out from the .zip file located in the reading item "Files for Week 3 Programming Assignments". Finish the code in the starter file.
Hint: Value of c should be all 1s
After you have completed the design, use Modelsim and the testbench in AAC2M3P3_tb.vp to test your code and create an output file with the name myvector.out. Your code in file AAC2M3P3.v, the input file vector.out, and the testbench AAC2M3P3_tb.vp must be in the same directory. Use this directory as the source directory for the Modelsim project. Submit your myvector.out file to complete this problem.