Could you tell which one is the right answer, please?
Gmall
25) The asynchronous inputs to a flip-flop are normally labeled as ASTART, STOP, and BPRE for normally active inputs, and CLR, CSET, and DON for high inputs.
26) Pulse-triggered flip-flops are also called level-triggered flip-flops.
27) Which of the following best describes the action of pulse-triggered flip-flops? A pulse on the clock transfers data from input to output.
28) When both inputs of a -K pulse-triggered FF are high, and the clock cycles, the output will remain unchanged.
29) The L in 74L71 stands for low power.
30) Which of the following is a primary characteristic of the data lock-out flip-flop? Data is only clocked into the FF on the clock transition.
31) A Hold time
32) Set-up time specifies the minimum time required for the control levels to be maintained at the inputs of a flip-flop prior to the triggering edge of the clock in order for data to be reliably clocked into the component.
