3. The NAND gate's unique output is a ______(HIGH, LOW), which only occurs when all inputs are ______(0, 1).
4. The NOR gate's unique output is a ______(HIGH, LOW), which only occurs when all inputs are ______(0, 1).
5. The NAND function can be created by inverting the output of a(n) ______(AND, NAND, NOR) gate.
6. The NOR function can be created by inverting the output of a(n) ______(AND, NAND, NOR) logic function.
7. The logic circuit shown in Fig. 3-17(a) performs the two-input ______(AND, NAND, NOR) logic function.
8. The logic circuit drawn in Fig. 3-17(b) performs the two-input ______(NAND, NOR, XOR) logic function.