In this Milestone, we will consider only circuits with a single output composed of AND, OR, XOR, and NOT gates. Each gate has at most two inputs, but it can have many outputs. Circuit inputs and outputs will be treated like gates. We will use a file to describe the topology of the circuit. The first line (line 0) contains the number of gates n in the circuit. This number includes the inputs and the single output of the circuit. Each next line is used to describe the properties of each gate. The remaining lines contain information for one circuit input, logic gate, or circuit output as described below. All gates are identified by their line number in the file. Each line consists of the following fields:
Field 0: the index i of the gate, followed by a colon.
Field 1: the letter A, O, X, N, I', or Q. This designates the gate as an AND gate, an OR gate, an XOR gate, a NOT gate, a circuit input, or a circuit output, respectively.
Field 2: two gate indices. These represent the two gates that are directly wired as inputs to gate i. We use the value 0 to denote gate inputs that are not used. For example, AND, OR, and XOR gates always use both gate inputs, NOT gates use only one gate input; circuit inputs do.
You should consider that the circuit is topologically ordered (a gate cannot use a signal that has not appeared in the file before it). Once the simulator has read in the circuit description, it asks the user to enter a value (0 or 1) for each of the circuit inputs. In order to calculate the output, you have to create a linked list (e.g. FIFO, stack, double linked list) that contains the gates. For each gate in the list, you should calculate the output value based on the values of the previous nodes. An example of a file and the corresponding circuit is given below: 7 1 : 7 00 2 : I 00 3 : N 2 0 4 : A 8 5 : 1 4 6 : X 7 : Q 60
