1. (1/2 pt) True/False: An ALU with 8 control lines will have 8 unique operations.
2. (1/2 pt) True/False: When a 4-bit ALU adds the HEX numbers A and 5, the carry out bit will be set.
3. (1/2 pt) True/False: A tri-state buffer would allow multiple driver to share a common line.
4. (1/2 pt) What is the difference between a Moore and a Mealy FSM?
5. (2 pt) What range of numbers may be represented by a 17-bit system assuming:
A) integers
B) negative numbers using two's complement
6. (2 pts) Gives the number $20_{10}$.
For full credit: show your work.
A) present the binary one's complement
B) present the binary two's complement
7. (2 pts) A digital logic chip has a 3.3 VDC output with the capability of driving 20 mA. Using NPN
transistors in a forced beta operating condition, sketch the schematic for a circuit with the capability
drive a 1.5 A load.
For full credit, show your work or explicitly state your assumptions
8. (2 pts) Given the logic for $N_2(S_2, S_1, S_0, F) = \sum m(0, 2, 6, 7, 8, 10, 11, 14, 15)$, express the Boolean lo
equation for the optimized state-next $N_2$.
Hint: a K-map is included for your convenience.
$N_2$ S\_F
$S_2S_1$
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