You are required to implement the design of a "11011" Sequence Detector using Logic
gates and JK Flip-flops and implement the circuit in any Simulator. a. Define overlap and
non-overlap in sequence detector (4 marks) b. Given a bit sequence of
"0011011011011011011011" have been received. Illustrate how the bit sequence of
"11011" are detected by using both non-overlapping and overlapping sequence detector.
(2 marks) c. Derive the state table, state diagram and state transition table for this
sequence detector. (Use overlapping). (15 Marks) (i) Determine the number of states
needed. (1 Mark) () Assign unique binary number (state vector) to each state - state table
(2 Marks) (iii) Draw the state diagram based on Mealy model. (8 Marks) (iv) Derive the
state transition table with output (4 Marks) d. Implementation using JK flip-flops (39
Marks) (i) Use three JK flip-flops labelled as Y2, Y1, and Y0 to implement the state value
and regenerate the state transition table based on these three flip flops (5 Marks) (6)
Generate the output table and equation. (4 Marks) (iii) Tabulate the Transition Table based
on these three flip-flops (5 Marks) (iv) Tabulate the excitation table for JK flip-flops. (2
Marks) (v) Implementation for Y2 flip-flop. (6 Marks) (1) Draw the excitation table for Y
JK flip-flop (2) Draw the K-map for J2 and K2 and derive their simplification equations. (
