Question 2 (0 pts) Suppose a computer has a processor with one L1 cache and one L2 cache. Let be the access time for L1 cache, 8 be the access time for L2 cache, and 102 be the total time to transfer a block of data from main memory to the L2 cache. Assume the hit rate in L1 cache is 0.96, the hit rate in L2 cache is 0.75, and the load through technique is not used. (a) What fraction of accesses miss in both the L1 and L2 caches, thus requiring access to the main memory? (b) What is t