The 'normal' CPU operations follows the sequence: Instruction Fetch (IF) -> Instruction Decode (ID) -> Instruction Execution (IE), which of the following statements is/are true?
When the MOVS instruction is used, the 'normal' CPU operations are changed to IF -> IE -> ID.
The load instruction will delay the IE of the next instruction by 2 clock cycles.
The sequence can be broken by using a conditional branch instruction.
The store instruction will delay the IE of the next instruction by 3 clock cycles.
