For the following configuration the BJT (NPN) has a common,
emitter current gain B=150.
(A) Determine the DC biasing current $I_{Bias}$, so that
the intrinsic voltage gain of the circuit $A_{vint} = V_{be}$
= 46 dB. What is the DC voltage at B and C, then?
(B) If the capacitance of $C_B$ and $C_C$ are great enough,
so that their impedances can be neglected, design
$C_E$, so that the circuit has a low cutoff frequency
of 50 Hz.
$V_{CC} = 15V$
$R_C = 30k$
$C_C$
$R_{sig}$ $C_B$
$3k$
$R_{BB}$ $100k$
$V_{sig}$
$I_{bias}$
$C_E$
$R_L = 30k$
