1. Assume the CPU is executing a program and the state of some of its registers is given in
the table below. Show how the registers would be updated by the sequence of ARM64
instructions listed below by filling in the Final Value column.
Show your work by listing the intermediate values of the registers.
Register
Current Value (show work here)
Final Value
x0
0
x1
1
x2
2
x3
3
Update the register state based on these instructions:
add x0, x0, #20
add x1, x0, x1
sub x2, x2, x1
add x2, x2, #3
sub x3, x3, x2
add x3, x3, x3
sub x3, x3, #1
lsr x1, x1, #4
and x3, x3, #0xfe
eor x0, x0, x0
orr x2, x2, #0
mvn x1, x1
add x1, x1, #1
