A computer has a five-stage instruction pipeline of one cycle each. The five stages are: Instruction Fetch (IF), Instruction Decode (ID), Operand Fetch (OF), Instruction Execution (IE), and Operand Store (OS). Consider the following code sequence, which is to be run on this computer.
Load 21, R1; R1 21;
Load 5, R2; R2 <--5;
Again: Sub R2, 1, R2 R2= R2 - 1;
Add R1, R2, R3; R3 =R1 + R2;
Bnn Again; branch to Again if result is Not Negative;
Add R4, R5, R6; R6 =R4 + R5;
Add R6, R4, R7; R7 =R4 + R6;
a. Analyze the execution of the above piece of code in order to calculate the number of cycles needed to execute the above code without pipelining, assuming that each instruction requires exactly 5 cycles to execute.
b. Give an estimate of the number of cycles needed to execute the above code if the pipeline described above is used. Assume that there is no forwarding hardware and that when branch instructions are fetched, the pipeline will “stall” until the target address is calculated and the branch decision is made. Ignore any data dependency.
c. assess the improvement by comparing a) to b)