Design the below question using logic gates.
Design a basic 16-bit calculator that has 4 data registers. The calculator can add, subtract, and check for equality, which are indicated by the control lines: add, sub, and equal. Furthermore, there is an Avg signal that indicates when the average of the sum or difference is desired. To determine which registers to operate on, you are given 4 signals that specify which of the registers are to be used, say w, x, y, and z, and signals wout, xout, yout, zout that indicate the location of the results register. Furthermore, assume you have to produce an error signal, Err, that indicates either an overflow or underflow. Assume the clock frequency is 1 GHz, and the propagation delays for each basic gate is 1 ns.
