2. 4-to-1-Line MUX Design.
Condensed truth table of a 4-to-1-Line Multiplexer is given below.
\begin{tabular}{|c|c|c|}
\hline
$S_1$ & $S_0$ & OUT \\
\hline
0 & 0 & $I_0$ \\
0 & 1 & $I_1$ \\
1 & 0 & $I_2$ \\
1 & 1 & $I_3$ \\
\hline
\end{tabular}
a. Preliminary work: Draw the logic diagram of 4:1 MUX using three 2:1 MUXs.
b. Preliminary work: Write OUT as a function of selection lines ($S_1$, $S_0$) and inputs ($I_0$, $I_1$, $I_2$, $I_3$).
