P6 (15 points): The component below is a 5-bit synchronous up-counter
with synchronous parallel-load. Design the following components using
5-bit synchronous up-counters and other gates as necessary:
Giable
Do
Q0
Di
Q1
D2
Q2
D3
Q3
Du
Qu
Loed
Clock
A: Design a 5-bit down counter.
B: Design a counter which produces the following sequence: 3, 4, 5, 6, 7,
8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 3, 4, 5, 6, 7....