Q1 For MIPS CPU, which of the following instructions computes $t3 = $t2 + 10?
a) add $t3, $t2, 10
b) addi $t3, $t2, 10
c) add $t2, $t3, 10
d) addi $t2, $t3, 10
Q2 For MIPS CPU, if $t3 holds 5000 then which of the following is a load instruction that loads register $t4 with data at memory address 5000?
a) lw $t4, 0($t3)
b) lw 0($t3), $t3
c) lw 0($t4), $t3
d) lw $t4, 0($t3)
Q3 The following sequence of micro-operations accomplishes the step of _______ in an instruction cycle.
MAR <- PC
IR <- M[MAR]
PC <- PC+1
a) loading an operand
b) executing an instruction
c) fetching an instruction
d) decoding an instruction
Q4 In the MARIE CPU model, the following sequence of micro-operations executes _______ instruction.
MAR <- 115
MBR <- M[MAR]
AC <- MBR
a) Add 115
b) Store 115
c) Load 115
d) Subt 115
Q5 In the MARIE CPU model, a memory address must be put in which of the following registers before the CPU can fetch the next instruction from the memory?
a) AC
b) PC
c) MBR
d) MAR
Q6 In the MARIE CPU model, a memory address must be put in which of the following registers before the CPU can load an operand for performing an addition operation?
a) MAR
b) AC
c) MBR
d) PC
Q7 A typical bus in a computer system consists of ___________________.
a) data, address, and interrupt lines
b) address, data, and control lines
c) data, address, and instruction lines
d) address, power, and I/O lines
Q8 Which of the following hardware components may be implemented by a combinational circuit?
a) program counter
b) full adder
c) data register
d) main memory
