Question

1. Suppose you have to implement two new commands in SAP-1 called ADI and SHL. i) ADI (Add Immediate) does the following- A ? A+RAM[PC], PC ? PC + 1 which means it will add the immediate byte following the opcode to A register and then increment the value of PC to prepare for the next instruction fetch. The instruction takes no operand. ii) SHL does the following- A ? SHLA which means it will shift the contents of A one bit left. The instruction takes no operand. [2+2=4] a. Write the microinstructions of T4, T5 and T6 for ADI and SHL. b. Generate the Control words for T4, T5 and T6 for ADI and SHL according to the following format- $\text{CON} = C_p, E_p, L_M, \overline{C_p}, E_i, L_i, \overline{E_i}, L_A, E_A, S_A, U_u, \overline{E_u}, L_B, L_O$ [2+2=4] [3+3=6] c. Draw the timing diagram for ADI and SHL command. d. The contents of the Control ROM and Address ROM are given here. Show the updated contents of these ROMs accommodating the ADI and SHL instruction (assuming a 32x12 Control ROM). Show only the relevant part of Control ROM but all of Address ROM. Assume the opcodes of the ADI and SHL instructions are

          1. Suppose you have to implement two new commands in SAP-1 called ADI and SHL.
i) ADI (Add Immediate) does the following-
A ? A+RAM[PC], PC ? PC + 1
which means it will add the immediate byte following the opcode to A register and then
increment the value of PC to prepare for the next instruction fetch. The instruction takes
no operand.
ii) SHL does the following-
A ? SHLA
which means it will shift the contents of A one bit left. The instruction takes no operand.
[2+2=4]
a. Write the microinstructions of T4, T5 and T6 for ADI and SHL.
b. Generate the Control words for T4, T5 and T6 for ADI and SHL according to the
following format-
$\text{CON} = C_p, E_p, L_M, \overline{C_p}, E_i, L_i, \overline{E_i}, L_A, E_A, S_A, U_u, \overline{E_u}, L_B, L_O$
[2+2=4]
[3+3=6]
c. Draw the timing diagram for ADI and SHL command.
d. The contents of the Control ROM and Address ROM are given here. Show the
updated contents of these ROMs accommodating the ADI and SHL instruction
(assuming a 32x12 Control ROM). Show only the relevant part of Control ROM but
all of Address ROM. Assume the opcodes of the ADI and SHL instructions are

1. Suppose you have to implement two new commands in SAP-1 called ADI and SHL.
i) ADI (Add Immediate) does the following-
A ? A+RAM[PC], PC ? PC + 1
which means it will add the immediate byte following the opcode to A register and then
increment the value of PC to prepare for the next instruction fetch. The instruction takes
no operand.
ii) SHL does the following-
A ? SHLA
which means it will shift the contents of A one bit left. The instruction takes no operand.
[2+2=4]
a. Write the microinstructions of T4, T5 and T6 for ADI and SHL.
b. Generate the Control words for T4, T5 and T6 for ADI and SHL according to the
following format-
CON = Cp, Ep, LM, Cp, Ei, Li, Ei, LA, EA, SA, Uu, Eu, LB, LO
[2+2=4]
[3+3=6]
c. Draw the timing diagram for ADI and SHL command.
d. The contents of the Control ROM and Address ROM are given here. Show the
updated contents of these ROMs accommodating the ADI and SHL instruction
(assuming a 32x12 Control ROM). Show only the relevant part of Control ROM but
all of Address ROM. Assume the opcodes of the ADI and SHL instructions are

Added by Daniel M.

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