4.11 Examine the difficulty of adding a proposed lwi.d rd, rs1, rs2 (“Load With Increment”)
instruction to RISC-V.
Interpretation: Reg[rd]=Mem[Reg[rs1]+Reg[rs2]]
4.11.1 (5 points) <§4.4> Which new functional blocks (if any) do we need for this instruction?
4.11.2 (5 points) <§4.4> Which existing functional blocks (if any) require modification?
4.11.3 (5 points) <§4.4> Which new data paths (if any) do we need for this instruction?
4.11.4 (5 points) <§4.4> What new signals do we need (if any) from the control unit to support
this instruction?